-
Notifications
You must be signed in to change notification settings - Fork 8.2k
soc/same54: Initial support #14685
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
soc/same54: Initial support #14685
Conversation
|
Found the following issues, please fix and resubmit: Identity/Emails issues9b3747865efa9f07bffc0742228ca0a8dbfaee70: author email (Benjamin Valentin [email protected]) needs to match one of the signed-off-by entries. 8841465af732dc80cf4179cd59f1bd8346ebf87a: author email (Benjamin Valentin [email protected]) needs to match one of the signed-off-by entries. License issuesIn most cases you do not need to do anything here, especially if the files
|
d3ed798 to
165dced
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The parenthesis trick is very neat and I'm going to use it :) But it might be better to put it with the other macro voodoo in the shared header so it can be reused:
#define UTIL_IS_PARENTHESIZED(x) UTIL_CHECK(UTIL_IS_PARENTHESIZED_ x, 0)
#define UTIL_IS_PARENTHESIZED_(...) 1, 1
You can also use some of the other macros in there to simply the usage later. For example, I'm planning on changing the GPIO handling to something like:
#define SAM0_EIC_IRQ_CONNECT(n, _) \
COND_CODE_1(UTIL_IS_PARENTHESIZED(DT_EIC_SAM0_IRQ(n)), ( { \
IRQ_CONNECT(DT_EIC_SAM0_IRQ(n), DT_EIC_SAM0_IRQ_PRIORITY(n), \
sam0_eic_isr, DEVICE_GET(sam0_eic), 0); \
irq_enable(DT_EIC_SAM0_IRQ(n)); \
} ), () )
...
UTIL_LISTIFY(16, SAM0_EIC_IRQ_CONNECT, _);
So if you don't mind I'd like to add the DTS changing and however you decide to handle the macro definitions to the GPIO PR and I can just drop it if yours gets merged first. Alternatively, I can just strip my current multi IRQ handling out and you can add something like the above to your changes for the EIC, whichever way you prefer.
|
Nice! I suppose it takes a super worm moon for this kind of macro magic to come forth. edit: making a separate pull request revealed that the change to A solution is to enclose all variables in parenthesizes in edit2: @galak suggested not to do anything weird with |
|
Oh well, it was a nice dream. I'll pull the parametric macros for the EIC out of Really, it'd be nice if |
|
Yes, I will indeed try to reduce the use of The parametric macros then can stay in the corresponding .c file |
|
Yeah I think it should be fine as long as you only reference devices by the label, it's just a bit odd when "SERCOM3" ends up as |
Codecov Report
@@ Coverage Diff @@
## master #14685 +/- ##
=========================================
Coverage ? 52.92%
=========================================
Files ? 309
Lines ? 45268
Branches ? 10451
=========================================
Hits ? 23956
Misses ? 16544
Partials ? 4768Continue to review full report at Codecov.
|
8f09e97 to
fdc1a5b
Compare
f294804 to
d1191d1
Compare
add0e67 to
7c1be9b
Compare
dbkinder
left a comment
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
+1 for docs
d3887de to
d08c678
Compare
It shares the same peripheral with other sam0 parts while differing in the clock config. Signed-off-by: Benjamin Valentin <[email protected]>
The RTC peripheral found in the SAMD5x/SAME5x MCUs is very simmilar to the one found in existing sam0 devices with only a few changes to register names and the clock source selection. Signed-off-by: Benjamin Valentin <[email protected]>
This adds a driver for the True Random Number Generator found in some Atmel SAM0 SoCs. The Code is based on the driver for the SAM TRNG, but uses different register and clock definitions. Signed-off-by: Benjamin Valentin <[email protected]>
This adds supoprt for the Atmel SAMD51 SoC. The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts. Signed-off-by: Benjamin Valentin <[email protected]>
This adds supoprt for the Atmel SAME51 SoC. The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts. Signed-off-by: Benjamin Valentin <[email protected]>
This adds supoprt for the Atmel SAME53 SoC. The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts. Signed-off-by: Benjamin Valentin <[email protected]>
We need to select TRIGACT_BLOCK for DMA to peripheral to work. Signed-off-by: Benjamin Valentin <[email protected]>
The amount of lock regions differs between different sam0 MCUs. saml10: 2 saml11: 4 samd2x: 16 saml2x: 16 samd5x: 32 ASF does not provide a definition for this, so create a new one in dts. Signed-off-by: Benjamin Valentin <[email protected]>
SAMD5x/SAME5x header files do not provide this define anymore. On SAMD2x it was 0, this is still valid. Signed-off-by: Benjamin Valentin <[email protected]>
This adds support for the Atmel SAM E54 Xplained Pro Evaluation Kit. Only basic functionality has been tested so far. Signed-off-by: Benjamin Valentin <[email protected]>
|
@galak I've split it into individual PRs as requested. |
@benpicco Do you plan to/are you already working on this? |
|
@stephanosio no i don't have any concrete plans for that. |
Ok, I will look into it then. At first glance, it seems to be using the same GMAC core as SAM7. |
The Atmel SAME54 is a Cortex M4F with Ethernet that shares it's peripherals with the sam0 family. (This seems to be true for all new Atmel parts, it certainly is for the new SAML1x Cortex M23 parts).
The MCU is part of the SAMD5x/SAME5x family - the E parts are identical to the D ones, but come with an additional GMAC Ethernet peripheral.
This adds support for the MCU and the SAM E54 Xplained Pro development board.
I ported all existing sam0 peripherals use the new clock setup if available.
What works:
depends on drivers: spi: sam/sam0: fix the driver #14876depends on drivers: i2c: Add SAM0 I2C driver #14128adc_apitestdepends on drivers: counter: Add SAM0 basic counter support #15105requires zephyrproject-rtos/hal_atmel#1