LPC SoC family GPIO interrupts #16589
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Found the following issues, please fix and resubmit: License issuesIn most cases you do not need to do anything here, especially if the files
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dts/bindings/gpio/nxp,lpc-gpio.yaml
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Include base.yaml and remove the properties that are now defined there.
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@MaureenHelm I revisited this pull yesterday, and realized after a rebase that I need to do some rework on this pull, including this .yaml.
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@MaureenHelm i've reworked this pull, please review it again.
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drivers/gpio/gpio_mcux_lpc.c
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Using DT_ALIAS_SW0_GPIOS_PIN here means that gpio interrupts will only work for the aliased buttons/switches. It will not work in the general case.
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@MaureenHelm What do you mean by "It will not work in the general case."?
InputMux device will map one pin to one interrupt (manual 19.6.3/4).
Analyzing the way I allocate PINT association, I'm not happy with the way I did it.
I'd rather have a static dts allocation, or even better, deduce PINT allocation according to isr no.
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You're always using the SW0 pin. What if I want to use a sensor pin for data ready interrupts?
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@MaureenHelm okay, I will change SW to something generic
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@MaureenHelm made the changes required, please review it again.
Thank you for your reviews!
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NXP's LPC family of MCU's GPIOs parameters is udated. Boards LPC54xxx and LPC55xxx have updated values according pin and interrupt layout. Signed-off-by: Andrei Gansari <[email protected]>
Board is refactored to use DTS generated value, not use magic numbers. Signed-off-by: Andrei Gansari <[email protected]>
LPC GPIO architecture uses multiple devices. GPIO input is routed via INPUTMUX to the PINT device which roots the interrupt to NVIC. Signed-off-by: Andrei Gansari <[email protected]>
PINT device is enabled when SoC is booting up. Applies to LPC54xxx and LPC55xxx families. Signed-off-by: Andrei Gansari <[email protected]>
Get separate LPC pint devices and GPIO includes. Signed-off-by: Andrei Gansari <[email protected]>
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@MaureenHelm I rebased and done the west split for this issue, please review. |
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We should have this target the new GPIO APIs and such. I'd say lets pend on this til the initial commit is in the However it probably makes sense to review zephyrproject-rtos/hal_nxp#11 and have that merged ASAP. |
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LPC54xxx and LPC55xxx GPIO interrupts enables.
PINT and INPUTMUX devices enabled to route interrupt signal from pin to NVIC.
Tested with GPIO driver sample.
Fixes #16167