[TOPIC-GPIO] gpio: Update mcux lpc driver to use new gpio api #19714

agansari · 2019-10-09T12:46:33Z

Updates the mcux lpc driver and LPC boards to use new device tree compatible gpio configuration flags. Implements new port get/set/clear/toggle and pin_interrupt_configure functions recently added to the gpio api.

Driver still supports port acces on some features. To be removed later.

Interrupts feature enabled in this pull in order to have a wider test array.
Ported from #16589, will be closed once this is merged.

Tested with:

samples/basic/blinky (pass - lpc54 and lpc55)
samples/basic/button (pass - lpc54 and lpc55)
tests/drivers/gpio/gpio_api_1pin (pass - lpc54)
tests/drivers/gpio/gpio_basic_api (pass - lpc54)

On boards:

lpcxpresso54114_m4
lpcxpresso55s69_cpu0

Tests in tests/drivers/ pass on lpc55s69 pass if run in debug mode.

zephyrbot · 2019-10-09T13:42:04Z

All checks are passing now.

Tip: The bot edits this comment instead of posting a new one, so you can check the comment's history to see earlier messages.

mnkp

LGTM with minor (but blocking) comments.

drivers/gpio/gpio_mcux_lpc.c

boards/arm/lpcxpresso54114/pinmux.c

drivers/gpio/gpio_mcux_lpc.c

carlescufi · 2019-10-10T14:02:39Z

@agansari
The topic branch has been rebased. Could you please rebase this PR against it?

drivers/gpio/gpio_mcux_lpc.c

boards/arm/lpcxpresso54114/pinmux.c

mnkp · 2019-10-11T09:50:22Z

It looks like something went wrong during the rebase process. There are some commits in this PR which shouldn't be here. It will probably require some manual clean up.

agansari · 2019-10-11T15:14:32Z

It looks like something went wrong during the rebase process. There are some commits in this PR which shouldn't be here. It will probably require some manual clean up.

@mnkp I rebased and moved the pin configuration to the test.

drivers/gpio/gpio_mcux_lpc.c

mnkp

Thanks for the update! Sorry, I overlooked two other minor issues. However, we should fix them to make sure the testcases can pass.

drivers/gpio/gpio_mcux_lpc.c

agansari · 2019-10-15T11:21:28Z

failing test is qemu base, not related to this pull

mnkp · 2019-10-15T23:56:55Z

It looks like this PR needs to be rebased after recent merges to topic-gpio branch.

agansari · 2019-10-16T09:34:18Z

It looks like this PR needs to be rebased after recent merges to topic-gpio branch.

@mnkp rebase and shippable passed

boards/arm/lpcxpresso55s69/pinmux.c

MaureenHelm · 2019-10-16T13:43:08Z

dts/bindings/gpio/nxp,lpc-gpio.yaml

Please add a license/copyright header

@MaureenHelm kinetis does not have one... should i do anything about it?

drivers/gpio/gpio_mcux_lpc.c

drivers/serial/usart_mcux_lpc.c

Updates the mcux lpc driver and all associated boards to use new device tree compatible gpio configuration flags. Implements new port get/set/clear/toggle functions recently added to the gpio api. ISR functions to be added later. Signed-off-by: Andrei Gansari <[email protected]>

NXP's LPC family of MCU's GPIOs parameters is udated. Boards LPC54xxx and LPC55xxx have updated values according pin and interrupt layout. Signed-off-by: Andrei Gansari <[email protected]>

Board is refactored to use DTS generated value, not use magic numbers. Signed-off-by: Andrei Gansari <[email protected]>

PINT device is enabled when SoC is booting up. Applies to LPC54xxx and LPC55xxx families. Signed-off-by: Andrei Gansari <[email protected]>

Use the latest commit available in hal_nxp repository. Signed-off-by: Andrei Gansari <[email protected]>

SoC initialization had an incorrect comment regarding system clock. Corrected from 48Mhz -> 96Mhz. Signed-off-by: Andrei Gansari <[email protected]>

Pull-up replaced by pull-down in particular test_gpio_port. Signed-off-by: Andrei Gansari <[email protected]>

LPC54114 to use D0 and D1 pinout. LPC55S69 to use A0 and A1 pinout. 2 pin test gpio_basic_api uses pins set up in boars' pinmux. Signed-off-by: Andrei Gansari <[email protected]>

LPC54114 to use D0 and D1 pinout. LPC55S69 to use A0 and A1 pinout. Pins enabled to be used as GPIO for 2 pin test gpio_basic_api. Signed-off-by: Andrei Gansari <[email protected]>

Add define that maps to IOCON register PULL-DOWN bit. Signed-off-by: Andrei Gansari <[email protected]>

Allocate all 8 PINT interrupts to ports 0 and 1, allocate 4 to each. Signed-off-by: Andrei Gansari <[email protected]>

LPC GPIO architecture uses multiple devices. GPIO input is routed via INPUTMUX to the PINT device which roots the interrupt to NVIC. Signed-off-by: Andrei Gansari <[email protected]>

agansari · 2019-10-17T12:58:15Z

@MaureenHelm can you review this again?

MaureenHelm · 2019-10-17T14:30:52Z

dts/bindings/gpio/nxp,lpc-gpio.yaml

agansari requested review from MaureenHelm, mnkp and pabigot as code owners October 9, 2019 12:46

MaureenHelm added the area: GPIO label Oct 9, 2019

galak mentioned this pull request Oct 9, 2019

Convert GPIO drivers to new GPIO API #18530

Closed

agansari added the platform: NXP NXP label Oct 9, 2019

zephyrbot added area: Devicetree area: Boards area: Tests Issues related to a particular existing or missing test area: Modules labels Oct 9, 2019

agansari force-pushed the gpio_topic_lpc branch from dfb55b3 to 2b868b2 Compare October 9, 2019 13:53

mnkp requested changes Oct 9, 2019

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pabigot force-pushed the topic-gpio branch from 67daa80 to 2b556e1 Compare October 10, 2019 13:57

agansari force-pushed the gpio_topic_lpc branch from 2b868b2 to a3e9eb0 Compare October 10, 2019 15:16

mnkp reviewed Oct 11, 2019

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boards/arm/lpcxpresso54114/pinmux.c Outdated Show resolved Hide resolved

agansari force-pushed the gpio_topic_lpc branch 6 times, most recently from 1eabe82 to 0da362b Compare October 11, 2019 15:13

mnkp reviewed Oct 11, 2019

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agansari force-pushed the gpio_topic_lpc branch from 0da362b to 08889c0 Compare October 14, 2019 12:21

mnkp reviewed Oct 14, 2019

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agansari force-pushed the gpio_topic_lpc branch from 08889c0 to b018f25 Compare October 15, 2019 06:04

mnkp approved these changes Oct 15, 2019

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agansari force-pushed the gpio_topic_lpc branch from b018f25 to 96bc17d Compare October 16, 2019 08:13

MaureenHelm requested changes Oct 16, 2019

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agansari force-pushed the gpio_topic_lpc branch from 96bc17d to 18a4ef8 Compare October 17, 2019 08:47

agansari added 11 commits October 17, 2019 12:08

dts: NXP LPC gpio updates

6568ded

NXP's LPC family of MCU's GPIOs parameters is udated. Boards LPC54xxx and LPC55xxx have updated values according pin and interrupt layout. Signed-off-by: Andrei Gansari <[email protected]>

boards: lpcxpresso55s69 pinmux macros refactor

28d7000

Board is refactored to use DTS generated value, not use magic numbers. Signed-off-by: Andrei Gansari <[email protected]>

soc: enable PINT device at LPC SoC boot

64346d5

PINT device is enabled when SoC is booting up. Applies to LPC54xxx and LPC55xxx families. Signed-off-by: Andrei Gansari <[email protected]>

west.yaml: hal_nxp updated to latest commit

82300ad

Use the latest commit available in hal_nxp repository. Signed-off-by: Andrei Gansari <[email protected]>

soc: LPC55xxx clock comment fix

67f6c37

SoC initialization had an incorrect comment regarding system clock. Corrected from 48Mhz -> 96Mhz. Signed-off-by: Andrei Gansari <[email protected]>

tests: gpio_basic_api fix bad message

1fab3c5

Pull-up replaced by pull-down in particular test_gpio_port. Signed-off-by: Andrei Gansari <[email protected]>

tests: add LPC boards to gpio_basic_api

2ddfddb

LPC54114 to use D0 and D1 pinout. LPC55S69 to use A0 and A1 pinout. 2 pin test gpio_basic_api uses pins set up in boars' pinmux. Signed-off-by: Andrei Gansari <[email protected]>

tests: lpc devices test pins enablement

3fd9c6d

LPC54114 to use D0 and D1 pinout. LPC55S69 to use A0 and A1 pinout. Pins enabled to be used as GPIO for 2 pin test gpio_basic_api. Signed-off-by: Andrei Gansari <[email protected]>

soc: define gpio pull-down for LPC54114

7c07aec

Add define that maps to IOCON register PULL-DOWN bit. Signed-off-by: Andrei Gansari <[email protected]>

dts: lpc devices allocate all gpio interrupts

fe7eed3

Allocate all 8 PINT interrupts to ports 0 and 1, allocate 4 to each. Signed-off-by: Andrei Gansari <[email protected]>

drivers: gpio_mcux_lpc GPIO interrupts

b5344b5

LPC GPIO architecture uses multiple devices. GPIO input is routed via INPUTMUX to the PINT device which roots the interrupt to NVIC. Signed-off-by: Andrei Gansari <[email protected]>

agansari force-pushed the gpio_topic_lpc branch from 18a4ef8 to b5344b5 Compare October 17, 2019 09:10

MaureenHelm approved these changes Oct 17, 2019

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dts/bindings/gpio/nxp,lpc-gpio.yaml Outdated

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MaureenHelm merged commit 78ace3d into zephyrproject-rtos:topic-gpio Oct 17, 2019

This was referenced Oct 18, 2019

Implement interrupt driven GPIO on LPC families #16167

Closed

LPC SoC family GPIO interrupts #16589

Closed

agansari deleted the gpio_topic_lpc branch December 9, 2019 09:54

[TOPIC-GPIO] gpio: Update mcux lpc driver to use new gpio api #19714

[TOPIC-GPIO] gpio: Update mcux lpc driver to use new gpio api #19714

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