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drivers: counter: sam_tc: Big fix for alarm 1 #93755
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drivers: counter: sam_tc: Big fix for alarm 1 #93755
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nandojve
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Test on sam_v71_xult/samv71q21: Ok
Issue: the alarm 1 do not generate interrupt There are three compare registers in a SAM TC channel: RA --> alarm 0 RB --> alarm 1 RC --> top_value By default the RB/TOIB was configured as an input and no longer generates interrupt. Set the direction of TIOB to output for alarm 1 interrupt. Fixes zephyrproject-rtos#85018 Signed-off-by: CHEN Xing <[email protected]>
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nandojve
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Hi Xing,
Thank you so much for this patch!
You are welcome! |
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Hi @MCHP-MPU-Solutions-SHA! To celebrate this milestone and showcase your contribution, we'd love to award you the Zephyr Technical Contributor badge. If you're interested, please claim your badge by filling out this form: Claim Your Zephyr Badge. Thank you for your valuable input, and we look forward to seeing more of your contributions in the future! 🪁 |
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The CI is failing on sam4l_wm400_cape, |
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Are we talking about this compiling error:
INFO - 1) drivers.counter.basic_api on sam4l_wm400_cape/sam4lc4b error (Build failure - error: 'TC_CMR_WAVEFORM_EEVT_XC0' undeclared here (not in a function); did you mean 'TC_CMR_WAVEFORM_EEVT_Msk'?)
I will update zephyrproject-rtos/hal_atmel repo for fixing it, then re-open this PR.
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You can already create the PR referring to your PR, see https://docs.zephyrproject.org/latest/develop/modules.html#submitting-changes-to-modules |



Issue: the alarm 1 do not generate interrupt
There are three compare registers in a SAM TC channel:
RA --> alarm 0
RB --> alarm 1
RC --> top_value
By default the RB/TOIB was configured as an input and no longer generates interrupt.
Set the direction of TIOB to output for alarm 1 interrupt.
Fixes #85018
Many thanks.
Xing.