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@ydamigos ydamigos commented Dec 15, 2017

Enables SPI driver for STM32F1 SoCs.

Tested on olimexino_stm32 using spi_loopback test.

Fixes #1281 and #3850.

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Some questions

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How is that SPI related? If the interrupt driver requires CONFIG_POLL=y, maybe it should select it.

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I just copy/paste some CONFIG_* from the spi_loopback prj.conf and forget to remove it. I will fix it.

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Shouldn't master NSS be output push pull?

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According to RM0008 NSS can be configured as

Hardware master /slave -> Input floating/ Input pull-up / Input pull-down
Hardware master/ NSS output enabled -> Alternate function push-pull
Software -> Not used. Can be used as a GPIO

I just added the first option to support multi master bus.

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Since this part is a bit tricky, it might be worse adding some comments.
You could also provide definitions for NSS output enabled, even if not used.
It might help user to understand what he need.
Exact reference to User manual (§25.3.1: Slave select (NSS) pin management) would also help.

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Why does this remain outside the new if statement, instead of moving inside? Similar questions below.

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@ydamigos ydamigos Dec 16, 2017

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I thought it should but it broke spi_loopback test. If the spi_context_update_rx() is not called, it will never move to the second rx_buf. I still try to understand why we use a null rx_buf in spi_loopback.

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I propose to move spi_context_update_rx() inside if and push another commit which will substitute null rx_bufs with dummy_rx_bufs in spi_loopback test. How does that sound to you?

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Interesting, so the .buf = NULL inside of the rx_bufs definitions (like in spi_rx_half_end()) in the spi_loopback test is breaking things, you mean?

If so, perhaps this is a bug in the SPI core? Haven't had time to look into it in detail, just to be clear.

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Interesting, so the .buf = NULL inside of the rx_bufs definitions (like in spi_rx_half_end()) in the spi_loopback test is breaking things, you mean?

Yes, it causes bus error on some SoCs (e.g. stm32f103, stm32f334).

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Thank you for your response!

@tbursztyka, could the test possibly be structuring its buffers incorrectly from what you meant?

If not, perhaps this is a bug in the STM32 area.

dbkinder
dbkinder previously approved these changes Dec 18, 2017
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+1 for docs

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Some minor comments otherwise looks good

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Why not using && data->ctx.rx_buf as you did for tx?
It makes both change and code lighter.
I guess this is a leftover from initial commit. Latest code allows you to do it now.

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I'll fix it.

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ditto

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I'll fix it.

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ditto

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I'll fix it.

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ditto

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I'll fix it.

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Since this part is a bit tricky, it might be worse adding some comments.
You could also provide definitions for NSS output enabled, even if not used.
It might help user to understand what he need.
Exact reference to User manual (§25.3.1: Slave select (NSS) pin management) would also help.

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@erwango Is this clear enough? STM32_PIN_SPI_MASTER_NSS_OUTPUT_ENABLED is too long.

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Yes this is fine, thanks

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ydamigos commented Jan 3, 2018

recheck

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mbolivar commented Jan 4, 2018

(FTR, my questions on this PR are all addressed. Not adding a +1 as I haven't looked at it in detail)

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All this NULL buffers should be clarified, apart from that it's OK for me.

@galak galak added the platform: STM32 ST Micro STM32 label Jan 9, 2018
@ydamigos ydamigos requested a review from superna9999 as a code owner January 11, 2018 10:25
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I'd like to have @tbursztyka review the changes around these NULL buffers check, the spi loopback test is running correctly on F0, L4 and F4.

@galak galak force-pushed the arm branch 2 times, most recently from ee5b12f to f95e5fd Compare January 11, 2018 22:07
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codecov-io commented Jan 12, 2018

Codecov Report

Merging #5413 into master will decrease coverage by 3.16%.
The diff coverage is n/a.

Impacted file tree graph

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==========================================
- Hits        23644    21683    -1961     
- Misses      19628    20066     +438     
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@galak galak added area: ARM ARM (32-bit) Architecture area: ADC Analog-to-Digital Converter (ADC) labels Jan 13, 2018
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dwagenk commented Jan 23, 2018

it's not working for me.

  1. I added SPI conf to stm32f3_disco and experienced hard fault problems as described in issue SPI fails on Nucleo_f334r8 #3850 when running spi loopback test.
  2. Worked when I applied the patches from this pull request until the last update about 1 hour ago.
  3. updated to current code in this PR
  4. it hangs forever (no hard fault anymore).
***** BOOTING ZEPHYR OS v1.10.99 - BUILD: Jan 23 2018 08:29:17 *****
[general] [INF] main: SPI test on buffers TX/RX 0x20001344/0x20000000
[general] [DBG] spi_async_call_cb: Polling...
[general] [INF] spi_complete_loop: Start
[general] [INF] spi_complete_loop: Passed
[general] [INF] spi_rx_half_start: Start
[general] [INF] spi_rx_half_start: Passed
[general] [INF] spi_rx_every_4: Start

Problem seems to be, that spi_context_update_rx is not called when buffer is empty. See in code comment in my review

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@dwagenk Could you try it again? It should be fixed now.

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dwagenk commented Jan 23, 2018

@ydamigos it's working now. Thanks

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This is not necessary anymore after PR #4646 is merged. Works for me without.

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Fixed

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I rebased it to resolve some conflicts.

Enables SPI driver for STM32F1 SoCs

Signed-off-by: Yannis Damigos <[email protected]>
Enable SPI1 port on olimexino_stm32.

Signed-off-by: Yannis Damigos <[email protected]>
TX/RX buffer may be NULL, so check them before use.

Signed-off-by: Yannis Damigos <[email protected]>
@ydamigos ydamigos changed the base branch from arm to master January 30, 2018 11:29
@ydamigos ydamigos removed the DNM This PR should not be merged (Do Not Merge) label Jan 30, 2018
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Now that PR #5785 is merged, I rebased it against master and removed the DNM flag.

Please review it again.

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Tested ok on nucleo_f103rb

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galak commented Jan 31, 2018

@dwagenk still have issues with this?

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dwagenk commented Feb 1, 2018

no, ydamigos solved those problems right away!

DWagenk commented 9 days ago
ydamigos it's working now. Thanks

@galak galak dismissed dwagenk’s stale review February 1, 2018 14:19

Issues addressed

@galak galak merged commit a3474a2 into zephyrproject-rtos:master Feb 1, 2018
@ydamigos ydamigos deleted the stm32f1-spi branch February 3, 2018 18:06
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