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4 changes: 2 additions & 2 deletions boards/arm/nrf5340pdk_nrf5340/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -26,8 +26,8 @@ config BOARD
# If the secure firmware is to be combined with a non-secure image
# (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
# be restricted to the secure image SRAM partition (sram-secure-partition).
# Otherwise (if TRUSTED_EXECUTION_SECURE is not set) the whole sram0 may be
# used by the image.
# Otherwise (if TRUSTED_EXECUTION_SECURE is not set) the whole zephyr,sram
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@ioannisg ioannisg Apr 23, 2020

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Now the sentence is more "generic" (as long as we're using zephyr,sram for image ram, which we do in all ARM platforms AFAIK)

# may be used by the image.
#
# For the non-secure version of the board, the firmware image SRAM is
# always restricted to the allocated non-secure SRAM partition.
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3 changes: 2 additions & 1 deletion boards/arm/nrf5340pdk_nrf5340/nrf5340pdk_nrf5340_cpuapp.dts
Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,10 @@

/ {
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram0_image;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,sram-secure-partition = &sram0_s;
zephyr,sram-non-secure-partition = &sram0_ns;
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There's some (inconsistent) precedent for documenting standard chosen properties in doc/guides/dts/legacy-macros.rst. The surrounded text suggests that it should be complete, so these should be added to it, replacing or augmenting the existing zephyr,sram entry.

@mbolivar-nordic if this section of that module remains relevant after we remove support for legacy macros perhaps it should move elsewhere before release?

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@mbolivar-nordic if this section of that module remains relevant after we remove support for legacy macros perhaps it should move elsewhere before release?

That's a good idea. I have added the following to my TODO list for v2.3 DT docs:

  • centralize documentation of chosen zephyr nodes to a non-legacy file, provide a reference to them from the intro

If you're OK with letting me take care of that after freeze, I will do so.

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@pabigot ^^
(I am ok, let me know if there's anything in need to do here)

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I'm fine with @mbolivar-nordic doing this later.

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thanks @pabigot

};
};
20 changes: 11 additions & 9 deletions boards/arm/nrf5340pdk_nrf5340/nrf5340pdk_nrf5340_cpuapp_common.dts
Original file line number Diff line number Diff line change
Expand Up @@ -164,21 +164,23 @@
};
};

&sram0 {
/ {

partitions {
compatible = "fixed-partitions";
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;

sram0_image: image@20000000 {
/* Zephyr image(s) memory */
};

/* SRAM allocated to the Secure image */
sram0_s: memory@20000000 {
label = "secure_sram_partition";
sram0_s: image_s@20000000 {
/* Secure image memory */
};

/* SRAM allocated to the Non-Secure image */
sram0_ns: memory@20010000 {
label = "non_secure_sram_partition";
sram0_ns: image_ns@20010000 {
/* Non-Secure image memory */
};
};
};
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Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@
* - Upper 64 kB SRAM allocated as Shared memory (sram0_shared)
* (see nrf5340pdk_nrf5340_shared_sram_planning_conf.dts)
*/
&sram0 {
&sram0_image {
reg = <0x20000000 DT_SIZE_K(448)>;
};

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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
* This file is included by both nRF5340 CPUAPP (Application MCU)
* and nRF5340 CPUNET (Network MCU).
* - 64 kB SRAM allocated as Shared memory (sram0_shared)
* - Region defined after the secure SRAM partition of CPUAPP
* - Region defined after the image SRAM of Application MCU
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this is actually a documentation fix

*/

/ {
Expand All @@ -17,10 +17,14 @@
zephyr,ipc_shm = &sram0_shared;
};

/* SRAM allocated to shared memory */
sram0_shared: memory@20070000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0x20070000 DT_SIZE_K(64)>;
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;

sram0_shared: memory@20070000 {
/* SRAM allocated to shared memory */
reg = <0x20070000 0x10000>;
};
};
};
4 changes: 3 additions & 1 deletion boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160.dts
Original file line number Diff line number Diff line change
Expand Up @@ -10,8 +10,10 @@

/ {
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram0_s;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,sram-secure-partition = &sram0_s;
zephyr,sram-non-secure-partition = &sram0_ns;
};
};
23 changes: 16 additions & 7 deletions boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts
Original file line number Diff line number Diff line change
Expand Up @@ -180,14 +180,23 @@
};

/ {
/* SRAM allocated and used by the BSD library */
sram0_bsd: memory@20010000 {
compatible = "mmio-sram";
};

/* SRAM allocated to the Non-Secure image */
sram0_ns: memory@20020000 {
compatible = "mmio-sram";
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;

sram0_s: image_s@20000000 {
/* Secure image memory */
};

sram0_bsd: image_bsd@20010000 {
/* BSD (shared) memory */
};

sram0_ns: image_ns@20020000 {
/* Non-Secure image memory */
};
};
};

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Original file line number Diff line number Diff line change
Expand Up @@ -39,13 +39,13 @@

/* Default SRAM planning when building for nRF9160 with
* ARM TrustZone-M support
* - Lowest 64 kB SRAM allocated to Secure image (sram0).
* - Lowest 64 kB SRAM allocated to Secure image (sram0_s).
* - 64 kB SRAM reserved for and used by the BSD socket
* library.
* library (sram0_bsd).
* - Upper 128 kB allocated to Non-Secure image (sram0_ns).
*/

&sram0 {
&sram0_s {
reg = <0x20000000 DT_SIZE_K(64)>;
};

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