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Set sram0 to represent the physical RAM in nRF5340 and nRF9160 DKs #24637
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Set sram0 to represent the physical RAM in nRF5340 and nRF9160 DKs #24637
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Now the sentence is more "generic" (as long as we're using zephyr,sram for image ram, which we do in all ARM platforms AFAIK)
galak
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Please use reserved memory as per:
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galak
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Do you need the labels?
galak
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Looks good, outside of the question if you need to label memory nodes (which I'd ask be removed, unless there's a really good reason for it).
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No I did not need the labels, that's right. What I wanted is some inline descriptive comments. |
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still a few labels in nrf9160dk_nrf9160_common.dts
boards/arm/nrf5340pdk_nrf5340/nrf5340pdk_nrf5340_cpuapp_common.dts
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boards/arm/nrf5340pdk_nrf5340/nrf5340pdk_nrf5340_shared_sram_planning_conf.dts
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needs #25009 |
We should not be using sram0 for image SRAM in nrf5340pdk. sram0 represents the physical SRAM and that one includes the shared memory between the two M33 CPUs on the SoC. We should not be re-sizing sram0 to account for the shared RAM; instead we would like to have sram0 representing the whole available SRAM. For that, we define a new memory node, sram0_image to represent the 'image' SRAM that is available for Zephyr on the board. sram0_image is the chosen image SRAM for default builds, i.e. when TrustZone is ignored (TRUSTED_EXECUTION_SECURE is not defined). Signed-off-by: Ioannis Glaropoulos <[email protected]>
We do not want sram0_shared to represent physical ram; this is just a portion of sram reserved for shared memory between Application and Network MCU. Therfore, we remove the 'mmio' compatible property and transform this node to a reserved-memory node definition, inside which we define the sram0_shared node along with its reg property. In addition we correct the documentation about the shared memory, stressing that it is placed after the image RAM of nrf5340 Application MCU (not after the secure SRAM). Signed-off-by: Ioannis Glaropoulos <[email protected]>
sram0 node is needed to hold the size of the total, physical SRAM available on nRF9160 SoC. We use sram0_s to represent the Secure image SRAM for nRF9160_dk builds. Signed-off-by: Håkon Øye Amundsen <[email protected]> Signed-off-by: Ioannis Glaropoulos <[email protected]>
We do not want sram0_ns and sram0_bsd to represent physical ram; these are just portions of sram reserved for the non-secure image and the bsd library, respectively. Thus we can remove the compatible property from these nodes. We also make use of 'reserved-memory' to represent the different memory partitions to be used by the nrf9160 builds. Signed-off-by: Ioannis Glaropoulos <[email protected]>
When we build Zephyr as Secure image on nRF340 Application MCU and nRF9160 SoC we would like to pass the information about the reserved memory area allocated to the Non-Secure images. The information may be needed to apply proper security configuration. We add a "chosen" node in board .dts file for this purpose. Signed-off-by: Ioannis Glaropoulos <[email protected]>
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carlescufi
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Seems to be using the commonly agreed mechanism now.
We would like to have
sram0DT node represent the available SRAM memory on nrf9160 and nRF5340 SoCs. As such, sram0 shall not be resized in Board DT configuration.In DTS we define sram0 node as such, but in boards//nrf5340pdk_ and nrf9160dk_ we have been using sram0 to represent (also) the image RAM allocated to Zephyr builds. The consequence is that sram0 is resized to match the requirements of the specific build (security domain, inter-processor shared memory, etc.), so we do not have a DTS generated macro to represent the total SRAM.
In this PR we fix this problem by having sram0 always represent the physical SRAM.
For nRF5340 we introduce sram0_image, to represent the RAM available for Zephyr image(s), secure and non-secure.
This PR is also adding additional information regarding reserved memory areas in board DT, such as SRAM memory areas explicitly allocated to secure and non-secure Zephyr execution environment.