[X86] X86TargetLowering::computeKnownBitsForTargetNode - add handling for VPMADD52L/VPMADD52H nodes

[RKSimon]

The X86ISD::VPMADD52L/VPMADD52H nodes truncates each element of operands 0 and 1 from 64-bits to 52-bits, unsigned multiplies them together and then extracts the lo/hi 52-bit result, zero-extends back to 64-bits and adds to the corresponding 64-bits element of operand 3.

computeKnownBitsForTargetNode needs to correctly handle X86ISD::VPMADD52L/VPMADD52H nodes with suitable test coverage

NOTE that the operand order appears to be different to the instruction encoding - so this might need to be checked on actual hardware (Cannonlake/IceLake/Znver4 probably).

Pulled out of #153787

[llvmbot]

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

1. Check that no other contributor is working on this issue. If someone is assigned to the issue or claimed to be working on it, ping the person. After one week without a response, the assignee may be changed.
2. Leave a comment indicating that you are working on the issue, or just create a pull request after following the steps below. Mention this issue in the description of the pull request.
3. Fix the issue locally.
4. Run the test suite locally. Remember that the subdirectories under test/ create fine-grained testing targets, so you can e.g. use make check-clang-ast to only run Clang's AST tests.
5. Create a Git commit.
6. Run git clang-format HEAD~1 to format your changes.
7. Open a pull request to the upstream repository on GitHub. Detailed instructions can be found in GitHub's documentation. Mention this issue in the description of the pull request.

If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below.

[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Simon Pilgrim (RKSimon)

The X86ISD::VPMADD52L/VPMADD52H nodes truncates each element of operands 0 and 1 from 64-bits to 52-bits, unsigned multiplies them together and then extracts the lo/hi 52-bit result, zero-extends back to 64-bits and adds to the corresponding 64-bits element of operand 3.

computeKnownBitsForTargetNode needs to correctly handle X86ISD::VPMADD52L/VPMADD52H nodes with suitable test coverage

NOTE that the operand order appears to be different to the instruction encoding - so this might need to be checked on actual hardware (Cannonlake/IceLake/Znver4 probably).

Pulled out of #153787

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

The X86ISD::VPMADD52L/VPMADD52H nodes truncates each element of operands 0 and 1 from 64-bits to 52-bits, unsigned multiplies them together and then extracts the lo/hi 52-bit result, zero-extends back to 64-bits and adds to the corresponding 64-bits element of operand 3.

computeKnownBitsForTargetNode needs to correctly handle X86ISD::VPMADD52L/VPMADD52H nodes with suitable test coverage

NOTE that the operand order appears to be different to the instruction encoding - so this might need to be checked on actual hardware (Cannonlake/IceLake/Znver4 probably).

Pulled out of #153787

[houngkoungting]

Hi @RKSimon , I’d like to work on this.