Skip to content

Conversation

@yanfeng3721
Copy link
Contributor

Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0. The PR is used for test, please do not merge.

smaslov-intel and others added 7 commits September 1, 2020 14:08
- Added caching of L0 command lists per pi device
- Command list created with an associated fence to track
  when the command list has successfully executed by the command queue
- Added SYCL_PI_LEVEL0_MAX_COMMAND_LIST_CACHE environment variable
  to set the maximum cache size (default: 20000)
- Fixed issue where command list reuse between queues failed to properly
add a new fence to the map.

Signed-off-by: Spruit, Neil R <[email protected]>
Signed-off-by: Byoungro So <[email protected]>
Add temporary support to enable online linking with the Level Zero
driver if the SYCL_ENABLE_LEVEL_ZERO_LINK environment variable is
set.

At the time this code was written, the Level Zero driver online
linking APIs exist, but they don't work.  We think the DPC++ runtime
support is ready, though, and we can enable it via this environment
variable.  This will allow testing with a new driver if one is
available before the next DPC++ release.
@yanfeng3721 yanfeng3721 changed the title [SYCLOS][Deps]Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0(for testing, please do not merge) [SYCL][Deps]Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0(for testing, please do not merge) Sep 2, 2020
smaslov-intel
smaslov-intel previously approved these changes Sep 2, 2020
Copy link
Contributor

@smaslov-intel smaslov-intel left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Please address review comments

smaslov-intel
smaslov-intel previously approved these changes Sep 3, 2020
@yanfeng3721 yanfeng3721 force-pushed the level_zero_v1_with_new_GPU branch from c46e30f to 5326eee Compare September 3, 2020 13:00
@yanfeng3721 yanfeng3721 changed the title [SYCL][Deps]Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0(for testing, please do not merge) [SYCL][Deps]Uplift GPURT to 20.34.17727 with Level Zero plugin to specification v1.0 Sep 3, 2020
@yanfeng3721 yanfeng3721 force-pushed the level_zero_v1_with_new_GPU branch from 73accc2 to dcc9747 Compare September 4, 2020 00:27
@yanfeng3721 yanfeng3721 force-pushed the level_zero_v1_with_new_GPU branch from 2cf186a to 6904a14 Compare September 4, 2020 02:30
@vladimirlaz vladimirlaz merged commit 6d34b95 into intel:sycl Sep 4, 2020
kbenzie pushed a commit to kbenzie/intel-llvm that referenced this pull request Feb 17, 2025
…ormTests

Enable platform CTS tests to run on all available platforms.
Chenyang-L pushed a commit that referenced this pull request Feb 18, 2025
Enable platform CTS tests to run on all available platforms.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

8 participants