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Merged
merged 5 commits into from
Oct 22, 2025
Merged

drivers: dma: BFLB DMA #95030

merged 5 commits into from
Oct 22, 2025

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@VynDragon
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@VynDragon VynDragon commented Aug 26, 2025 •
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Adds BFLB DMA.

@VynDragon VynDragon requested a review from nandojve August 27, 2025 11:56
@VynDragon VynDragon force-pushed the bflb_dma branch 2 times, most recently from 238c537 to 75399de Compare August 30, 2025 03:34
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github-actions bot commented Aug 30, 2025 •
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The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff
hal_bouffalolab zephyrproject-rtos/hal_bouffalolab@9f2ab1b zephyrproject-rtos/hal_bouffalolab@89df832 (main) zephyrproject-rtos/[email protected]

✅ All manifest checks OK

Note: This message is automatically posted and updated by the Manifest GitHub Action.

@github-actions github-actions bot added manifest manifest-hal_bouffalolab DNM (manifest) This PR should not be merged (controlled by action-manifest) labels Aug 30, 2025
@VynDragon VynDragon marked this pull request as ready for review August 30, 2025 04:03
@zephyrbot zephyrbot added platform: Bouffalo Lab area: DMA Direct Memory Access area: RISCV RISCV Architecture (32-bit & 64-bit) area: Clock Control labels Aug 30, 2025
@VynDragon VynDragon force-pushed the bflb_dma branch 2 times, most recently from 776df91 to 2b5793b Compare September 1, 2025 17:52
nandojve
nandojve requested changes Sep 6, 2025
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@VynDragon VynDragon removed area: Flash area: Tests Issues related to a particular existing or missing test labels Oct 12, 2025
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teburd commented Oct 21, 2025

The manifest changes aren't done yet, happy to approve when CI is green

@VynDragon
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VynDragon commented Oct 21, 2025

Apologies, I thought there would be additional issues. Technically it needs to be approved then i can merge the module side, but sicne you say it would be approved that means it would have 2 approval, so ill do the manifest and modules stuffs.

@github-actions github-actions bot removed the DNM (manifest) This PR should not be merged (controlled by action-manifest) label Oct 21, 2025
teburd
teburd previously approved these changes Oct 21, 2025
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VynDragon commented Oct 21, 2025

Thanks!

@nandojve @josuah Please re-approve for merge, all issues previously mentionned should've been solved unless I missed them, thank you!

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VynDragon commented Oct 21, 2025

Found 2 little last minute issues, sorry.

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VynDragon commented Oct 21, 2025

Great, ANOTHER unrelated ci failure.

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VynDragon commented Oct 21, 2025

Well the doc build isnt happening i guess...

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VynDragon commented Oct 21, 2025

See #98012 for the fix...

josuah
josuah approved these changes Oct 21, 2025
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I don't see anything unresolved and no new issue found, thank you!

Now let's see CI.

@VynDragon
west.yml: Update hal_bouffalolab revision
3d4fb58 
Update hal revision to fix double defines
and missing bl70x dma defines

Signed-off-by: Camille BAUD <[email protected]>
@VynDragon
dts: bflb: Add DMA node for BFLB SoCs
f59623f 
Adds the DMA node

Signed-off-by: Camille BAUD <[email protected]>
@VynDragon
drivers: dma: Introduce BFLB DMA driver
296fbfa 
Introduce BFLB's DMA.

Signed-off-by: Camille BAUD <[email protected]>
@VynDragon
drivers: clock_control: Update clock control to support new peripherals
f82d1d7 
Guarantees De-gating the peripherals.

Signed-off-by: Camille BAUD <[email protected]>
@VynDragon
boards: Add DMA to supported for bflb boards
3e838d7 
Adds the dma to supported for testing

Signed-off-by: Camille BAUD <[email protected]>
@josuah josuah requested a review from teburd October 21, 2025 16:43
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sonarqubecloud bot commented Oct 21, 2025

Quality Gate Passed Quality Gate passed

Issues
2 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

@VynDragon VynDragon mentioned this pull request Oct 21, 2025
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@kartben kartben merged commit 3c224b4 into zephyrproject-rtos:main Oct 22, 2025
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@cfriedt cfriedt mentioned this pull request Nov 13, 2025
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Reviewers

@teburd teburd teburd approved these changes

@nandojve nandojve nandojve approved these changes

@josuah josuah josuah approved these changes

@carlocaione carlocaione Awaiting requested review from carlocaione

@edersondisouza edersondisouza Awaiting requested review from edersondisouza

@fkokosinski fkokosinski Awaiting requested review from fkokosinski

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Labels

area: Boards/SoCs area: Clock Control area: Devicetree Bindings area: DMA Direct Memory Access area: RISCV RISCV Architecture (32-bit & 64-bit) manifest manifest-hal_bouffalolab platform: Bouffalo Lab

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@VynDragon @josuah @teburd @nandojve @kartben @nordic-krch @zephyrbot