drivers: counter: sam_tc: Big fix for alarm 1 #94691
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Issue: the alarm 1 do not generate interrupt There are three compare registers in a SAM TC channel: RA --> alarm 0 RB --> alarm 1 RC --> top_value By default the RB/TOIB was configured as an input and no longer generates interrupt. Set the direction of TIOB to output for alarm 1 interrupt. Fixes zephyrproject-rtos#85018 Signed-off-by: CHEN Xing <[email protected]>
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Issue: the alarm 1 do not generate interrupt
There are three compare registers in a SAM TC channel:
RA --> alarm 0
RB --> alarm 1
RC --> top_value
By default the RB/TOIB was configured as an input and no longer generates interrupt.
Set the direction of TIOB to output for alarm 1 interrupt.
Fixes #85018
This is the second attempt after the fixes to SAM4L been applied in zephyrproject-rtos/hal_atmel#49.