Make BFLB not use the SDK code #91977

VynDragon · 2025-06-21T19:54:04Z

What's in the title.

Large update that cannot be cut without breaking functionality.

Some drivers are getting entirely revamped, such as uart and pinctrl, do not consider those as updates of the older drivers, but rather new drivers (which is true to some large extent).

soc/bflb/bl60x/soc.c

kartben · 2025-07-07T07:47:21Z

drivers/serial/uart_bflb.c

 	}
+	/* clear interrupts that require ack*/
+	tmp = sys_read32(cfg->base_reg + UART_INT_CLEAR_OFFSET);
+	tmp = tmp | UART_CR_URX_RTO_CLR;


I think there's more that needs clearing, e.g. you've enabled PCE so UART_CR_URX_PCE_CLR ; probably UART_CR_URX_END_CLR and UART_CR_UTX_END_CLR as well?

Okay no, deleted message was right but i looked at the wrong place UART_CR_URX_END_CLR and UART_CR_UTX_END_CLR 's interrupts should be masked and UART_CR_URX_PCE_CLR is handled in uart_bflb_err_check

(masked = interrupt not thrown to CPU, but i think it was required for working?)

kartben · 2025-07-07T08:02:49Z

soc/bflb/common/e24/soc_irq_privileged.c

+void riscv_clic_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
+{
+	ARG_UNUSED(irq);
+	ARG_UNUSED(prio);
+	ARG_UNUSED(flags);
+}


would be good to document why it's not being implemented? Or... should it be implemented?

It should probably yes, will look into it.

Shell sample isnt working on this PR while it should anyway so i have some checks to do...

It works with debugger.... uuuurgh

fixing this has had the knock-off effect of somehow fixing the shell sample without the little wait I just added... Sometimes I really dont understand those chips...

kartben · 2025-07-07T08:05:09Z

drivers/serial/uart_bflb.c

+	tmp = sys_read32(cfg->base_reg + UART_STATUS_OFFSET);
+	rc = tmp & UART_STS_UTX_BUS_BUSY;
+	tmp = sys_read32(cfg->base_reg + UART_FIFO_CONFIG_1_OFFSET);
+	rc += tmp & UART_TX_FIFO_CNT_MASK;
+	return (rc > 0 ? 1 : 0);


i think you have the logic backwards?
irq_tx_complete returns 1 If nothing remains to be transmitted ; 0 If transmission is not completed.

tx is probably not complete if UART_STS_UTX_BUS_BUSY is set or if FIFO still contains data?

Sounds like it yes

Done

Note tx fifo count is inverted, it counts free bytes.

kartben · 2025-07-07T08:21:02Z

drivers/serial/uart_bflb.c

+int uart_bflb_irq_tx_ready(const struct device *dev)
+{
+	const struct bflb_config *const cfg = dev->config;
+	uint32_t tmp = 0;
+
+	tmp = sys_read32(cfg->base_reg + UART_FIFO_CONFIG_1_OFFSET);
+	return (tmp & UART_TX_FIFO_CNT_MASK) > 0;
+}
+
+int uart_bflb_irq_rx_ready(const struct device *dev)
+{
+	const struct bflb_config *const cfg = dev->config;
+	uint32_t tmp = 0;
+
+	tmp = sys_read32(cfg->base_reg + UART_FIFO_CONFIG_1_OFFSET);
+	return (tmp & UART_RX_FIFO_CNT_MASK) > 0;
+}
+


you've setup thresholds so raw count shouldn't be used? I think this should instead check if UART_URX_FIFO_INT / UART_UTX_FIFO_INT are set/pending.

These interrupts are masked, functionally it's the same (And there might have been a reason, interrupts gave me, and continue to give me, a lot of trouble on this platform, I wouldnt remember but it's possible there was issues doing it with the interrupt).

kartben · 2025-07-07T08:25:03Z

boards/aithinker/ai_wb2_12f/support/bl60x.cfg

-    reg mstatus 0x7800
-    reg mie 0x0
-#    reg pc 0x23000000
+    reg mstatus 0x80000000


bit 31 of mstatus is read-only?

Not sure where that's from, I see the same, maybe 0x0 is more appropriate.

VynDragon · 2025-07-18T17:57:00Z

Rebased on main.

VynDragon · 2025-07-18T18:16:25Z

Squashed commits that couldn't build by themselves (so almost all of them...)

nandojve

I see more points for improvement but since this is a big change already I think it is fine to move this way. Then we improve gradually to avoid stuck the PR.

dts/bindings/interrupt-controller/sifive,legacy-clic.yaml

soc/bflb/bl60x/CMakeLists.txt

soc/bflb/bl60x/Kconfig.defconfig

soc/bflb/bl60x/CMakeLists.txt

soc/bflb/bl60x/Kconfig.defconfig

This reverts 514258a which causes issues here Signed-off-by: Camille BAUD <[email protected]>

VynDragon · 2025-07-20T12:51:05Z

rebased on main

Reorganize and update soc folder files for SDK-independance Reorganize and update hal_bouffalolab files for SDK-independance Reorganize and update soc dts files for SDK-independance Update serial and pinctrl driver files for SDK-independance Update ai_wb2_12f, bl604e_iot_dvk, and dt_bl10_dvk to new bl60x support and fixup openocd config of ai_wb2_12f Signed-off-by: Camille BAUD <[email protected]>

mostly makes things a little bit safer Signed-off-by: Camille BAUD <[email protected]>

sonarqubecloud · 2025-07-20T13:41:45Z

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

nandojve · 2025-08-01T08:53:36Z

ping @kartben

maass-hamburg · 2025-08-01T12:07:01Z

regarding soc: bflb: re-add ATOMIC_OPERATIONS_C are you sure, that the riscv cpu has the atomic extention?
Or what was the problem

VynDragon · 2025-08-01T12:20:11Z

regarding soc: bflb: re-add ATOMIC_OPERATIONS_C are you sure, that the riscv cpu has the atomic extention? Or what was the problem

Yes, it is supposed to work, but doesn't, so it is a problem for later.

VynDragon requested a review from nandojve June 21, 2025 19:54

VynDragon changed the title ~~Make BFLB not used the SDK code~~ Make BFLB not use the SDK code Jun 21, 2025

VynDragon force-pushed the bl60x_nosdk branch 5 times, most recently from 6e0c76d to f2a098f Compare June 21, 2025 20:59

kartben reviewed Jun 21, 2025

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VynDragon force-pushed the bl60x_nosdk branch 4 times, most recently from 175cf3f to 324da9a Compare June 22, 2025 12:30

VynDragon marked this pull request as ready for review June 22, 2025 13:13

github-actions bot added area: Pinctrl area: Interrupt Controller platform: bouffalolab area: UART Universal Asynchronous Receiver-Transmitter area: RISCV RISCV Architecture (32-bit & 64-bit) area: Flash platform: Bouffalo Lab area: Clock Control labels Jun 22, 2025

github-actions bot requested review from carlocaione, dcpleung, de-nordic, fkokosinski, gmarull, kgugala, mgielda, nashif and nordic-krch June 22, 2025 13:14

kartben reviewed Jul 7, 2025

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VynDragon force-pushed the bl60x_nosdk branch 3 times, most recently from 418a18c to 382a12e Compare July 7, 2025 11:32

VynDragon requested review from kartben and nandojve July 10, 2025 09:06

VynDragon force-pushed the bl60x_nosdk branch from 382a12e to efd6af5 Compare July 18, 2025 17:56

VynDragon force-pushed the bl60x_nosdk branch 2 times, most recently from 83cb97c to dd434c7 Compare July 18, 2025 18:14

nandojve requested changes Jul 19, 2025

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dts/bindings/interrupt-controller/sifive,legacy-clic.yaml Outdated Show resolved Hide resolved

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soc/bflb/bl60x/Kconfig.defconfig Outdated Show resolved Hide resolved

VynDragon force-pushed the bl60x_nosdk branch from dd434c7 to 6b79d64 Compare July 19, 2025 12:43

nandojve requested changes Jul 19, 2025

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soc/bflb/bl60x/Kconfig.defconfig Outdated Show resolved Hide resolved

soc: bflb: re-add ATOMIC_OPERATIONS_C

830aaf6

This reverts 514258a which causes issues here Signed-off-by: Camille BAUD <[email protected]>

VynDragon force-pushed the bl60x_nosdk branch from 6b79d64 to f2c1fd8 Compare July 20, 2025 12:51

VynDragon force-pushed the bl60x_nosdk branch from f2c1fd8 to 76b9cae Compare July 20, 2025 13:18

VynDragon requested a review from nandojve July 20, 2025 13:18

VynDragon added 2 commits July 20, 2025 15:25

drivers: misc bflb updates

7836108

mostly makes things a little bit safer Signed-off-by: Camille BAUD <[email protected]>

VynDragon force-pushed the bl60x_nosdk branch from 76b9cae to 7836108 Compare July 20, 2025 13:25

nandojve approved these changes Jul 20, 2025

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kartben approved these changes Aug 1, 2025

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cfriedt merged commit 633c0fe into zephyrproject-rtos:main Aug 1, 2025
27 checks passed

henrikbrixandersen removed the platform: bouffalolab label Aug 5, 2025

Make BFLB not use the SDK code #91977

Make BFLB not use the SDK code #91977

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VynDragon commented Jun 21, 2025

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VynDragon commented Jul 18, 2025

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VynDragon commented Jul 20, 2025

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