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arch: Added initial OpenRISC port #83933
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Hello @jhol, and thank you very much for your first pull request to the Zephyr project! |
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@stffrdhrn Please feel free to comment. This work was the origin of the TTMR fix for Qemu. |
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The tests will not be able to complete because the tool-chain does not have the |
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@jhol please split into multiple commits, see https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#multiple-commits-on-a-single-pr for reference. |
This has now been done! |
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v3 of the patch set makes the following changes:
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v4 of the patch set makes the following changes:
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v5 of the patch set makes the following changes:
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The OpenRISC 1000 architecture can be tested through the qemu_or1k emulated
SoC and board. Because this emulated device has minimal external hardware
by default, this patch enables a minimal suite of tests covering core
kernel features for the CPU architecture.
When running the test suite, OpenRISC was found to require additional stack
space to prevent an overflow. Therefore, a minimal additional amount of
storage: 128-bytes, was added that was found in practice to allow tests to
complete.
Note that Qemu version 9.2.0 or newer is required so as to include the
following commit:
commit 3eb43aeb164f1f83c97ff693c7d464b49755110c
Author: Joel Holdsworth <[email protected]>
Date: Fri Jun 7 15:29:33 2024 -0700
hw/openrisc: Fixed undercounting of TTCR in continuous mode
This fixes a bug in the implementation of the emulated OpenRISC Tick Timer
which prevents the Zephyr OpenRISC port from task-scheduling properly.
Signed-off-by: Joel Holdsworth <[email protected]>
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The following west manifest projects have changed revision in this Pull Request:
Additional metadata changed:
⛔ DNM label due to: 1 project with metadata changes Note: This message is automatically posted and updated by the Manifest GitHub Action. |
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Here is v8 of the patch-set with the following changes:
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@npitre I applied your suggestion concerning Concerning the timer driver, it's not so clear to me what needs to happen here. To me, the OpenRISC timer driver doesn't look so very different from the Risc-V driver, but I'm happy to make any amendments. |
You may look at commit 0ea64b3 for explanation and the needed changes, Also, if your |
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@jhol I managed to build the toolchain and qemu and was trying this PR. was able to build, but did not get any output from qemu:
picolibc did not work for me, not sure what is going on: running qemu: |
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Thanks for testing. What version of qemu do you have? |
9.2.1, you can also get it from here https://github.com/zephyrproject-rtos/sdk-ng/actions/runs/13472947957/artifacts/2635045345 (PR zephyrproject-rtos/sdk-ng#871) |
Awesome. I'll test it out when I have time in the coming days |
I've only been testing with the debian toolchain; haven't played with this one yet, and I haven't tried zephyr yet, just the picolibc test suite. |
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Note in QEMU the openrisc virt platform does provide reboot via the syscon-reboot device. I guess we could add support for virt later?
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My mistake, this was already presented in my absence. |
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Architecture WG 2025-02-18:
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This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time. |
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This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time. |
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@jhol Thanks for your zephyr openrisc port. It is working well in my mor1kx and marocchino FPGA board with just minor update. |
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@zgliu799 I'm glad it worked out for you. Can you publish the fixes? I have a couple of small mods to-do on my side as well. The project got stalled because I got busy with other work for the past few months. However, I would like to press ahead with the up-streaming. The most major missing piece is getting an or1k GCC build included in the Zephyr tool-chain. I have this PR to add support, but I didn't get around to testing it yet. |
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@jhol I did below modifications: I tried the or1k-elf-gcc and also managed to build the or1k-zephyr-elf-gcc with your sdk-ng update . They are working in my setup to build zephyr. |
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This PR has now been resurrected in #98160 |
This patch adds support for the OpenRISC 1000 (or1k) architecture: a MIPS-like open hardware ISA which was first introduced in 2000.
This patch adds basic architecture support for the architecture, as well as a board and soc support for the Qemu virtual ork1ksim board.