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  • Add pinctrl support to the OpenISA RV32M1 SoC
  • Add pinctrl support to the OpenISA RV32M1 peripheral drivers (lpuart, lpi2c, lpspi, tpm)
  • Convert the OpenISA VEGAboard from pinmux to pinctrl

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Note: As I do not have access to a machine parseable list of the allowed pin MUX settings, I have left out the otherwise recommended vnd-soc-pkgxx.h header file (see https://docs.zephyrproject.org/latest/hardware/pinctrl/index.html).

@henrikbrixandersen henrikbrixandersen force-pushed the rv32m1_pinctrl branch 3 times, most recently from 662cd71 to 38d4fd3 Compare May 2, 2022 09:40
@zephyrbot zephyrbot added area: GPIO area: RISCV RISCV Architecture (32-bit & 64-bit) area: UART Universal Asynchronous Receiver-Transmitter labels May 2, 2022
@zephyrbot zephyrbot requested review from teburd and tgorochowik May 2, 2022 12:10
@henrikbrixandersen henrikbrixandersen requested review from gmarull and removed request for tgorochowik May 2, 2022 12:19
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lgtm, a few minor comments

Add OpenISA RV32M1 pinctrl header file to define SoC specific pinctrl_soc_t
structure. This is used to store pin configurations for the pinctrl driver.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Add pinctrl devicetree bindings for the OpenISA RV32M1.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Add OpenISA RV32M1 pinctrl driver.

Signed-off-by: Henrik Brix Andersen <[email protected]>
The OpenISA RV32M1 pinctrl groups need a dummy pinctrl node to populate
with pinctrl options at the board level.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Add pinctrl support to the OpenISA RV32M1 LPUART serial driver.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Add pinctrl support to the OpenISA RV32M1 LPI2C I2C driver.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Add pinctrl support to the OpenISA RV32M1 LPSPI SPI driver.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Add pinctrl support to the OpenISA RV32M1 TPM PWM driver.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Convert the OpenISA RV32M1 VEGAboard from pinmux to pinctrl.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Remove the default pinmux Kconfig configuration from the OpenISA RV32M1
SoC.

Signed-off-by: Henrik Brix Andersen <[email protected]>
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henrikbrixandersen commented May 3, 2022

so shouldn't it be made optional? seems though that in many cases slow could be preferred, and with a default people will forget about it :-)

Exactly why I am not making it optional. The hardware default is "fast", but likely many pins should be configured for "slow". I do not like putting in a DTS default that does not match the hardware default. By making this property required, users are required to consider if the slew rate should be "fast" or "slow".

This is equivalent to the NXP Kinetis pinctrl binding, by the way, on which this is based:

The two IPs are very alike.

@henrikbrixandersen henrikbrixandersen requested a review from gmarull May 3, 2022 11:05
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Codecov Report

Merging #45274 (3122a2c) into main (005968a) will increase coverage by 0.00%.
The diff coverage is 100.00%.

❗ Current head 3122a2c differs from pull request most recent head 05ccb61. Consider uploading reports for the commit 05ccb61 to get more accurate results

Impacted file tree graph

@@           Coverage Diff           @@
##             main   #45274   +/-   ##
=======================================
  Coverage   49.86%   49.86%           
=======================================
  Files         643      643           
  Lines       80617    80626    +9     
  Branches    18933    18933           
=======================================
+ Hits        40197    40206    +9     
  Misses      33757    33757           
  Partials     6663     6663           
Impacted Files Coverage Δ
kernel/sched.c 88.71% <100.00%> (+0.16%) ⬆️
kernel/work.c 87.67% <100.00%> (ø)
include/zephyr/sys/time_units.h 97.51% <0.00%> (-0.50%) ⬇️
subsys/testsuite/ztest/src/ztress.c 88.09% <0.00%> (-0.48%) ⬇️
boards/posix/native_posix/timer_model.c 52.17% <0.00%> (+0.72%) ⬆️
drivers/timer/hpet.c 87.75% <0.00%> (+1.02%) ⬆️

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@gmarull gmarull requested a review from danieldegrasse May 3, 2022 14:25
@dleach02 dleach02 merged commit 0acb154 into zephyrproject-rtos:main May 5, 2022
@henrikbrixandersen henrikbrixandersen deleted the rv32m1_pinctrl branch May 15, 2022 18:45
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area: API Changes to public APIs area: Boards area: Devicetree Binding PR modifies or adds a Device Tree binding area: Devicetree area: GPIO area: I2C area: Pinctrl area: PWM Pulse Width Modulation area: RISCV RISCV Architecture (32-bit & 64-bit) area: SPI SPI bus area: UART Universal Asynchronous Receiver-Transmitter platform: openisa/RV32M1 openisa/RV32M1

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7 participants