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@danieldegrasse danieldegrasse commented Apr 13, 2022

Enable pin control on LPC11u6x SOCs. The following boards have been converted:

  • faze
  • lpcxpresso11u68

This PR is dependent on #44842, as the LPC11u6x port configuration registers are not contiguous, so calculating offsets using the port and pin is not possible.

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@mbittan I am unsure if you are still active on Github, but could you test this PR against an LPCxpresso11u68 if possible?

The project has a mandate to move from pinmux APIs to Linux style pin control APIs to handle pin selection by the next release, hence these changes. I do not currently have hardware to test on, so I can only verify that this patch builds for the faze and lpcxpresso11u68 targets. If the serial port input/output works correctly, as well as an application using I2C, then this PR likely works fine on hardware.

@danieldegrasse danieldegrasse mentioned this pull request Apr 13, 2022
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mbittan commented Apr 14, 2022

@mbittan I am unsure if you are still active on Github, but could you test this PR against an LPCxpresso11u68 if possible?

The project has a mandate to move from pinmux APIs to Linux style pin control APIs to handle pin selection by the next release, hence these changes. I do not currently have hardware to test on, so I can only verify that this patch builds for the faze and lpcxpresso11u68 targets. If the serial port input/output works correctly, as well as an application using I2C, then this PR likely works fine on hardware.

I will test this as soon as possible

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I tested this PR on a lpcxpresso11u68 board: everything is ok except UART which does not work. The changes I suggest fix the issue on both boards.

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clkid must remain to bring the UART controller out of reset

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Same here, clkid is still necessary

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We can't use the instance number for this driver because all the UART controllers of the LPC11U6X are not the same.
This should work:

Suggested change
PINCTRL_DT_INST_DEFINE(idx); \
PINCTRL_DT_DEFINE(DT_NODELABEL(uart##idx)); \

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The instance number can't be used here either, this should work:

Suggested change
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
.pincfg = PINCTRL_DT_DEV_CONFIG_GET(DT_NODELABEL(uart##idx)), \

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This can be removed too

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@mbittan I've implemented your changes, but when testing using the LPCXpresso11u68 EVK we are not seeing output on the UART4 pins. This issue exists in this PR, and on the main branch. Is there a step we are missing in testing the Zephyr enablement for this board? Also, what was the reason for selecting UART4 as the primary Zephyr console, instead of UART0, which is connected to the onboard debugger?

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mbittan commented Apr 19, 2022

@mbittan I've implemented your changes, but when testing using the LPCXpresso11u68 EVK we are not seeing output on the UART4 pins. This issue exists in this PR, and on the main branch. Is there a step we are missing in testing the Zephyr enablement for this board?

UART4 should work without any specific configuration. For example, the hello_world sample works correctly on my board (which is an LPCxpressoV2 RevC) with your updated patches and on the main branch. What revision of the board are you using ? How are you testing the UART4 on your board ?

Also, what was the reason for selecting UART4 as the primary Zephyr console, instead of UART0, which is connected to the onboard debugger?

We chose UART4 because it was accessible on the arduino connector, but I agree that it makes more sense to use UART0.

Regarding the LPC11U6*-pinctrl.h files, I think it would be better it they were located in the zephyr tree. That would allow the lpc11u6x port to stay independent of the NXP HAL.

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Regarding the LPC11U6*-pinctrl.h files, I think it would be better it they were located in the zephyr tree. That would allow the lpc11u6x port to stay independent of the NXP HAL.

Hi @danieldegrasse.

I agree with Maxime that there may be rewards (don't ask me which ones, I'd be embarrassed) to keep the lpc11u6x support standalone (i.e. not dependent on the NXP HAL). It was part of the effort when we wrote this port.

I think that the pin muxing is the same for all LPC11U6x SoCs. The only difference is the availability of pins which depends on the package size (48, 64 or 100 pins). So, IMHO, we can have a single pinctrl header file in Zephyr to hold all the definitions.

Note that the LPC11U67JBD48-pinctrl.h and LPC11U68JBD100-pinctrl.h files provided by the NXP HAL are identical. And so the LPC11U67JBD48-pinctrl.h file does include definitions for pins that are not available on the 48-pin package...

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@mbittan @simonguinot I'll go ahead and move the header in tree. The reason that headers are currently generated per-package is due to the way the generation script used for other LPC parts (such as LPC55s69) works, and you are correct that all the LPC11u6x parts have the same pinmux settings.

I am also going to move the default UART port to UART0 as part of this PR (on the LPC11u68 EVK), since that will make it simpler for new Zephyr users to get started with the platform.

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dleach02 commented May 2, 2022

@mbittan can we get your feedback on the current state of this PR? I would like to get it ready and merged before the feature freeze on 5/13

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mbittan previously approved these changes May 2, 2022
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Looks good to me

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why not name this one pinctrl?

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The pio0 through pio2 nodes are used by the GPIO driver to determine base addresses for each IOCON port, so the compatible string for the iocon node needs to define the properties for each pio child node. Then, the child pinctrl node has its own properties, and that node has the pincontrol selection defined as children.

I believe if this node was pinctrl then the pio child nodes could not be present, because they do not contain the same properties as pin control groups (which are the children of the pinctrl node) do. Please correct me if that is wrong, because this node being named pinctrl would be cleaner.

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If a child has a compatible set, then it can do whatever it wants, see for example STM32/GD32 pinctrl/gpio layout.

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Makes sense. The only other hurdle to renaming that pin control node would be that the lpc pin control driver currently relies on the node label iocon being present in the devicetree in order to get the base address of the pin controller. I used the node label directly because like the iMX pin control, there are several different register layouts present across the SOC families with the IOCON peripheral, so there is not one shared DTS compatible string that could be used for all pin control nodes.

So I could either:

  • rename the iocon node for all devices currently using this pin control driver (and rework the dts binding file (currently the RT600 and all LPC SOCs use this driver)
  • add a corner case to this driver for the LPC11u6x

personally, I would rather keep the driver and node naming as it currently is designed, but if you feel strongly about this, I can rename the iocon node across the LPC line. I would prefer not to add a corner case for the LPC11u6x, however.

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I think it would make more sense to make iocon the pinctrl (following stm32/gd32 layout), but this can be improved later.

@simonguinot simonguinot self-requested a review May 9, 2022 19:58
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Hi @danieldegrasse,
Thanks for this PR. It is looking good.

dleach02
dleach02 previously approved these changes May 10, 2022
mmahadevan108
mmahadevan108 previously approved these changes May 10, 2022
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please update includes, otherwise lgtm

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Suggested change
#include <drivers/pinctrl.h>
#include <zephyr/drivers/pinctrl.h>

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Suggested change
#include <drivers/pinctrl.h>
#include <zephyr/drivers/pinctrl.h>

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Suggested change
#include <drivers/pinctrl.h>
#include <zephyr/drivers/pinctrl.h>

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Suggested change
#include <devicetree.h>
#include <zephyr/devicetree.h>

add pin control definitions for LPC11u6x to LPU11u6x pinctrl binding.

Signed-off-by: Daniel DeGrasse <[email protected]>
update lpc11u6x dtsi file to include required DTS nodes to support LPC
pin control

Signed-off-by: Daniel DeGrasse <[email protected]>
add pin control definitions to LPC11u6x soc file, to handle the lack of
a HAL for this SOC.

Signed-off-by: Daniel DeGrasse <[email protected]>
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.

Signed-off-by: Daniel DeGrasse <[email protected]>
add pin control header to enable pin control support for lpc11u6x

Signed-off-by: Daniel DeGrasse <[email protected]>
Update pin control driver for lpc11u6x. This SOC does not have a HAL,
so fsl_clock is not available. It also lacks a slew-rate field in the
IOCON register, so this property must be optional.

Signed-off-by: Daniel DeGrasse <[email protected]>
add pin control definitions and nodes to faze board, which uses an
LPC11u67 SOC.

Signed-off-by: Daniel DeGrasse <[email protected]>
Add pin control node definitions to lpcxpresso11u68 board.

Signed-off-by: Daniel DeGrasse <[email protected]>
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.

Signed-off-by: Daniel DeGrasse <[email protected]>
Enable pin control for lpc11u6x i2c driver, and remove pinmux usage from
board level DTS files.

Signed-off-by: Daniel DeGrasse <[email protected]>
Enable pin control api for lpc11u6x serial driver, and remove pinmux api
usage.

Signed-off-by: Daniel DeGrasse <[email protected]>
Enable pin control for lpc11u6x soc by selecting CONFIG_PINCTRL=y.
At this time no drivers are ported.

Signed-off-by: Daniel DeGrasse <[email protected]>
UART0 is routed to onboard debugger on LPC11u68 EVK. Change the default
console from UART4 to UART0 to enable output on the onboard debugger
console.

Signed-off-by: Daniel DeGrasse <[email protected]>
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@gmarull headers should be updated

@dleach02 dleach02 merged commit 48877f8 into zephyrproject-rtos:main May 10, 2022
@dleach02 dleach02 deleted the lpc-11u6x-pinctrl branch May 10, 2022 22:27
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