boards: arm: GD32F450I-EVAL: add initial support

boards/arm/gd32f403z_eval/Kconfig.board

@@ -3,4 +3,4 @@
 
 config BOARD_GD32F403Z_EVAL
 	bool "GigaDevice GD32F403Z Evaluation Kit"
-	depends on SOC_GD32F403Z
+	depends on SOC_GD32F403

boards/arm/gd32f403z_eval/gd32f403z_eval.dts

@@ -5,7 +5,7 @@
 
 /dts-v1/;
 
-#include <gigadevice/gd32f403zet6.dtsi>
+#include <gigadevice/gd32f403/gd32f403zet6.dtsi>
 
 / {
 	model = "GigaDevice GD32F403Z Evaluation Kit";

boards/arm/gd32f403z_eval/gd32f403z_eval_defconfig

@@ -1,8 +1,8 @@
 # Copyright (c) 2021, ATL Electronics
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SOC_SERIES_GD32F4=y
-CONFIG_SOC_GD32F403Z=y
+CONFIG_SOC_SERIES_GD32F403=y
+CONFIG_SOC_GD32F403=y
 CONFIG_BOARD_GD32F403Z_EVAL=y
 
 CONFIG_ARM_MPU=y

boards/arm/gd32f450i_eval/CMakeLists.txt

@@ -0,0 +1,5 @@
+# Copyright (c) 2021, Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+zephyr_library_sources(board.c)

boards/arm/gd32f450i_eval/Kconfig

@@ -0,0 +1,8 @@
+# Copyright (c) 2021 Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_INIT_PRIORITY
+	int "Board initialization priority"
+	default 50
+	help
+	  Board initialization priority.

boards/arm/gd32f450i_eval/Kconfig.board

@@ -0,0 +1,6 @@
+# Copyright (c) 2021, Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_GD32F450I_EVAL
+	bool "GigaDevice GD32F450I-EVAL"
+	depends on SOC_GD32F450

boards/arm/gd32f450i_eval/Kconfig.defconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2021 Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_GD32F450I_EVAL
+
+config BOARD
+	default "gd32f450i_eval"
+
+endif # BOARD_GD32F450I_EVAL

boards/arm/gd32f450i_eval/board.c

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2021, Teslabs Engineering S.L.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <init.h>
+
+static int board_init(const struct device *dev)
+{
+	rcu_periph_clock_enable(RCU_GPIOA);
+
+	/* PA9: USART0 TX */
+	gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_9);
+	gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_9);
+	gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_2MHZ, GPIO_PIN_9);
+
+	/* PA10: USART0 RX */
+	gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_10);
+	gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_10);
+	gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_2MHZ, GPIO_PIN_10);
+
+	rcu_periph_clock_disable(RCU_GPIOA);
+
+	return 0;
+}
+
+SYS_INIT(board_init, PRE_KERNEL_1, CONFIG_BOARD_INIT_PRIORITY);

boards/arm/gd32f450i_eval/board.cmake

@@ -0,0 +1,4 @@
+# Copyright (c) 2021, Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/arm/gd32f450i_eval/doc/index.rst

@@ -0,0 +1,146 @@
+.. _gd32f450i_eval:
+
+GigaDevice GD32F450I-EVAL
+#########################
+
+Overview
+********
+
+The GD32F450I-EVAL board is a hardware platform that enables prototyping
+on GD32F450IK Cortex-M4F Stretch Performance MCU.
+
+The GD32F450IK features a single-core ARM Cortex-M4F MCU which can run up
+to 200 MHz with flash accesses zero wait states, 3072kiB of Flash, 256kiB of
+SRAM and 140 GPIOs.
+
+.. image:: img/gd32f450i_eval.png
+     :align: center
+     :alt: gd32f450i_eval
+
+
+Hardware
+********
+
+- GD32F450IKT6 MCU
+- AT24C02C 2Kb EEPROM
+- GD25Q32C 16Mbit SPI and QSPI NOR Flash
+- GD9FS1G8F2A 1Gbit NAND Flash
+- Micron MT48LC16M16A2P-6AIT 256Mbit SDRAM
+- 3 x User LEDs
+- 3 x User Push buttons
+- 1 x USART (RS-232 at J1 connector)
+- 1 x POT connected to an ADC input
+- Headphone interface
+- Micro SD Card Interface
+- USB FS connector
+- USB HS connector
+- 1 x CAN
+- Ethernet Interface
+- 3.5" RGB-LCD (320x480)
+- OV2640 Digital Camera
+- GD-Link on board programmer
+- J-Link/JTAG connector
+
+For more information about the GD32F450 SoC and GD32F450I-EVAL board:
+
+- `GigaDevice Cortex-M4F Stretch Performance SoC Website`_
+- `GD32F450xx Datasheet`_
+- `GD32F4xx User Manual`_
+- `GD32F450I-EVAL User Manual`_
+
+Supported Features
+==================
+
+The board configuration supports the following hardware features:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Peripheral
+     - Kconfig option
+     - Devicetree compatible
+   * - NVIC
+     - N/A
+     - :dtcompatible:`arm,v7m-nvic`
+   * - SYSTICK
+     - N/A
+     - N/A
+   * - USART
+     - :kconfig:`CONFIG_SERIAL`
+     - :dtcompatible:`gd,gd32-usart`
+
+Serial Port
+===========
+
+The GD32F450I-EVAL board has one serial communication port. The default port
+is USART0 with TX connected at PA9 and RX at PA10.
+
+Programming and Debugging
+*************************
+
+Before programming your board make sure to configure boot and serial jumpers
+as follows:
+
+- J2/3: Select 2-3 for both (boot from user memory)
+- J5: Select 1-2 position (labeled as ``USART0``)
+
+Using GD-Link
+=============
+
+The GD32F450I-EVAL includes an onboard programmer/debugger (GD-Link) which
+allows flash programming and debugging over USB. There is also a JTAG header
+(J1) which can be used with tools like Segger J-Link.
+
+#. Build the Zephyr kernel and the :ref:`hello_world` sample application:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: gd32f450i_eval
+      :goals: build
+      :compact:
+
+#. Run your favorite terminal program to listen for output. On Linux the
+   terminal should be something like ``/dev/ttyUSB0``. For example:
+
+   .. code-block:: console
+
+      minicom -D /dev/ttyUSB0 -o
+
+   The -o option tells minicom not to send the modem initialization
+   string. Connection should be configured as follows:
+
+      - Speed: 115200
+      - Data: 8 bits
+      - Parity: None
+      - Stop bits: 1
+
+#. To flash an image:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: gd32f450i_eval
+      :goals: flash
+      :compact:
+
+   You should see "Hello World! gd32f450i_eval" in your terminal.
+
+#. To debug an image:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: gd32f450i_eval
+      :goals: debug
+      :compact:
+
+
+.. _GigaDevice Cortex-M4F Stretch Performance SoC Website:
+   https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m4/stretch-performance-line/
+
+.. _GD32F450xx Datasheet:
+	https://gd32mcu.21ic.com/data/documents/shujushouce/GD32F450xx_Datasheet_Rev1.1.pdf
+
+.. _GD32F4xx User Manual:
+	https://www.gigadevice.com/manual/gd32f450xxxx-user-manual/
+
+.. _GD32F450I-EVAL User Manual:
+	http://www.gd32mcu.com/download/down/document_id/120/path_type/1

boards/arm/gd32f450i_eval/gd32f450i_eval.dts

@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2021, Teslabs Engineering S.L.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <gigadevice/gd32f4xx/gd32f450ik.dtsi>
+
+/ {
+	model = "GigaDevice GD32F450I-EVAL";
+	compatible = "gd,gd32f450i-eval";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &usart0;
+		zephyr,shell-uart = &usart0;
+	};
+};
+
+&usart0 {
+	status = "okay";
+	current-speed = <115200>;
+};

boards/arm/gd32f450i_eval/gd32f450i_eval.yaml

@@ -0,0 +1,13 @@
+# Copyright (c) 2021, Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: gd32f450i_eval
+name: GigaDevice GD32F450I-EVAL
+type: mcu
+arch: arm
+ram: 112
+flash: 3072
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools

boards/arm/gd32f450i_eval/gd32f450i_eval_defconfig

@@ -0,0 +1,14 @@
+# Copyright (c) 2021, Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_GD32F4XX=y
+CONFIG_SOC_GD32F450=y
+CONFIG_BOARD_GD32F450I_EVAL=y
+
+CONFIG_ARM_MPU=y
+CONFIG_HW_STACK_PROTECTION=y
+CONFIG_CORTEX_M_SYSTICK=y
+
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y

boards/arm/gd32f450i_eval/support/openocd.cfg

@@ -0,0 +1,25 @@
+# Copyright (c) 2021, ATL-Electronics
+# Copyright (c) 2021, Teslabs Engineering S.L.
+# SPDX-License-Identifier: Apache-2.0
+
+source [find interface/cmsis-dap.cfg]
+transport select swd
+
+set CHIPNAME gd32f450ik
+set CPUTAPID 0x790007a3
+
+source [find target/stm32f4x.cfg]
+
+reset_config trst_and_srst separate
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}
+

dts/arm/gigadevice/gd32f403zet6.dtsi → dts/arm/gigadevice/gd32f403/gd32f403zet6.dtsi

@@ -5,7 +5,7 @@
  */
 
 #include <mem.h>
-#include <gigadevice/gd32f403.dtsi>
+#include <gigadevice/gd32f403/gd32f403.dtsi>
 
 / {
 	soc {

dts/arm/gigadevice/gd32f4xx/gd32f450ik.dtsi

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2021 Teslabs Engineering S.L.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <gigadevice/gd32f4xx/gd32f4xx.dtsi>
+
+/ {
+	soc {
+		flash-controller@40023c00 {
+			flash0: flash@8000000 {
+				reg = <0x08000000 DT_SIZE_K(3072)>;
+			};
+		};
+	};
+};