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Merged
merged 5 commits into from
Nov 13, 2018
Merged

scripts: dts: Use DT_ prefix in generated labels #11180

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4dbf936
scripts: dts: Use DT_ prefix in generated labels
anangl Oct 31, 2018
a574569
dts_fixups: Update labels generated from DTS with DT_ prefix
anangl Nov 13, 2018
b3ca789
drivers: serial: Update DTS-derived labels with DT_ prefix
anangl Nov 8, 2018
7fcab26
soc: cc2650: Update DTS-derived labels with DT_ prefix
anangl Nov 8, 2018
48e1549
dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
anangl Nov 13, 2018
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4 changes: 2 additions & 2 deletions arch/arm/core/irq_manage.c
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Original file line number Diff line number Diff line change
Expand Up @@ -108,10 +108,10 @@ void _irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
* affecting performance (can still be useful on systems with a
* reduced set of priorities, like Cortex-M0/M0+).
*/
__ASSERT(prio <= ((1 << CONFIG_NUM_IRQ_PRIO_BITS) - 1),
__ASSERT(prio <= ((1 << DT_NUM_IRQ_PRIO_BITS) - 1),
"invalid priority %d! values must be less than %d\n",
prio - _IRQ_PRIO_OFFSET,
(1 << CONFIG_NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
(1 << DT_NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
NVIC_SetPriority((IRQn_Type)irq, prio);
}

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12 changes: 6 additions & 6 deletions boards/arc/arduino_101_sss/dts_fixup.h
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Original file line number Diff line number Diff line change
Expand Up @@ -4,10 +4,10 @@
* SPDX-License-Identifier: Apache-2.0
*/

#define CONFIG_BMI160_SLAVE SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BASE_ADDRESS
#define CONFIG_BMI160_SPI_PORT_NAME SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BUS_NAME
#define CONFIG_BMI160_GPIO_DEV_NAME SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_CONTROLLER
#define CONFIG_BMI160_GPIO_PIN_NUM SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_PIN
#define CONFIG_BMI160_NAME SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_LABEL
#define CONFIG_BMI160_SPI_BUS_FREQ SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_SPI_MAX_FREQUENCY
#define DT_BMI160_SLAVE DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BASE_ADDRESS
#define DT_BMI160_SPI_PORT_NAME DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BUS_NAME
#define DT_BMI160_GPIO_DEV_NAME DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_CONTROLLER
#define DT_BMI160_GPIO_PIN_NUM DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_PIN
#define DT_BMI160_NAME DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_LABEL
#define DT_BMI160_SPI_BUS_FREQ DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_SPI_MAX_FREQUENCY

24 changes: 12 additions & 12 deletions boards/arc/em_starterkit/arc_mpu_regions.c
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Original file line number Diff line number Diff line change
Expand Up @@ -27,18 +27,18 @@ static struct arc_mpu_region mpu_regions[] = {
AUX_MPU_RDP_KW | AUX_MPU_RDP_KR),

#else
#if CONFIG_ICCM_SIZE > 0
#if DT_ICCM_SIZE > 0
/* Region ICCM */
MPU_REGION_ENTRY("ICCM",
CONFIG_ICCM_BASE_ADDRESS,
CONFIG_ICCM_SIZE * 1024,
DT_ICCM_BASE_ADDRESS,
DT_ICCM_SIZE * 1024,
REGION_FLASH_ATTR),
#endif
#if CONFIG_DCCM_SIZE > 0
#if DT_DCCM_SIZE > 0
/* Region DCCM */
MPU_REGION_ENTRY("DCCM",
CONFIG_DCCM_BASE_ADDRESS,
CONFIG_DCCM_SIZE * 1024,
DT_DCCM_BASE_ADDRESS,
DT_DCCM_SIZE * 1024,
AUX_MPU_RDP_KW | AUX_MPU_RDP_KR),
#endif
#if CONFIG_SRAM_SIZE > 0
Expand All @@ -58,18 +58,18 @@ static struct arc_mpu_region mpu_regions[] = {
};
#else /* CONFIG_USERSPACE */
static struct arc_mpu_region mpu_regions[] = {
#if CONFIG_ICCM_SIZE > 0
#if DT_ICCM_SIZE > 0
/* Region ICCM */
MPU_REGION_ENTRY("ICCM",
CONFIG_ICCM_BASE_ADDRESS,
CONFIG_ICCM_SIZE * 1024,
DT_ICCM_BASE_ADDRESS,
DT_ICCM_SIZE * 1024,
REGION_FLASH_ATTR),
#endif
#if CONFIG_DCCM_SIZE > 0
#if DT_DCCM_SIZE > 0
/* Region DCCM */
MPU_REGION_ENTRY("DCCM",
CONFIG_DCCM_BASE_ADDRESS,
CONFIG_DCCM_SIZE * 1024,
DT_DCCM_BASE_ADDRESS,
DT_DCCM_SIZE * 1024,
REGION_RAM_ATTR),
#endif
#if CONFIG_SRAM_SIZE > 0
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24 changes: 12 additions & 12 deletions boards/arc/nsim_em/arc_mpu_regions.c
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Original file line number Diff line number Diff line change
Expand Up @@ -27,18 +27,18 @@ static struct arc_mpu_region mpu_regions[] = {
AUX_MPU_RDP_KW | AUX_MPU_RDP_KR),

#else
#if CONFIG_ICCM_SIZE > 0
#if DT_ICCM_SIZE > 0
/* Region ICCM */
MPU_REGION_ENTRY("ICCM",
CONFIG_ICCM_BASE_ADDRESS,
CONFIG_ICCM_SIZE * 1024,
DT_ICCM_BASE_ADDRESS,
DT_ICCM_SIZE * 1024,
REGION_FLASH_ATTR),
#endif
#if CONFIG_DCCM_SIZE > 0
#if DT_DCCM_SIZE > 0
/* Region DCCM */
MPU_REGION_ENTRY("DCCM",
CONFIG_DCCM_BASE_ADDRESS,
CONFIG_DCCM_SIZE * 1024,
DT_DCCM_BASE_ADDRESS,
DT_DCCM_SIZE * 1024,
AUX_MPU_RDP_KW | AUX_MPU_RDP_KR),
#endif
#endif /* ARC_MPU_VER == 3 */
Expand All @@ -50,18 +50,18 @@ static struct arc_mpu_region mpu_regions[] = {
};
#else /* CONFIG_USERSPACE */
static struct arc_mpu_region mpu_regions[] = {
#if CONFIG_ICCM_SIZE > 0
#if DT_ICCM_SIZE > 0
/* Region ICCM */
MPU_REGION_ENTRY("ICCM",
CONFIG_ICCM_BASE_ADDRESS,
CONFIG_ICCM_SIZE * 1024,
DT_ICCM_BASE_ADDRESS,
DT_ICCM_SIZE * 1024,
REGION_FLASH_ATTR),
#endif
#if CONFIG_DCCM_SIZE > 0
#if DT_DCCM_SIZE > 0
/* Region DCCM */
MPU_REGION_ENTRY("DCCM",
CONFIG_DCCM_BASE_ADDRESS,
CONFIG_DCCM_SIZE * 1024,
DT_DCCM_BASE_ADDRESS,
DT_DCCM_SIZE * 1024,
REGION_RAM_ATTR),
#endif
/* Region Peripheral */
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34 changes: 17 additions & 17 deletions boards/arm/96b_argonkey/dts_fixup.h
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Expand Up @@ -9,24 +9,24 @@
* generated data matches the driver definitions.
*/

#define CONFIG_HTS221_NAME ST_STM32_I2C_V1_40005800_ST_HTS221_5F_LABEL
#define CONFIG_HTS221_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005800_ST_HTS221_5F_BUS_NAME
#define DT_HTS221_NAME DT_ST_STM32_I2C_V1_40005800_ST_HTS221_5F_LABEL
#define DT_HTS221_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_HTS221_5F_BUS_NAME

#define CONFIG_LPS22HB_DEV_NAME ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_LABEL
#define CONFIG_LPS22HB_I2C_ADDR ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BASE_ADDRESS
#define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BUS_NAME
#define DT_LPS22HB_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_LABEL
#define DT_LPS22HB_I2C_ADDR DT_ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BASE_ADDRESS
#define DT_LPS22HB_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BUS_NAME

#define CONFIG_VL53L0X_NAME ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_LABEL
#define CONFIG_VL53L0X_I2C_ADDR ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BASE_ADDRESS
#define CONFIG_VL53L0X_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BUS_NAME
#define DT_VL53L0X_NAME DT_ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_LABEL
#define DT_VL53L0X_I2C_ADDR DT_ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BASE_ADDRESS
#define DT_VL53L0X_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BUS_NAME

#define CONFIG_LSM6DSL_DEV_NAME ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_LABEL
#define CONFIG_LSM6DSL_SPI_SELECT_SLAVE ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BASE_ADDRESS
#define CONFIG_LSM6DSL_SPI_MASTER_DEV_NAME ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BUS_NAME
#define CONFIG_LSM6DSL_SPI_BUS_FREQ ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_SPI_MAX_FREQUENCY
#define CONFIG_LSM6DSL_GPIO_DEV_NAME ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_CONTROLLER
#define CONFIG_LSM6DSL_GPIO_PIN_NUM ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_PIN
#define DT_LSM6DSL_DEV_NAME DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_LABEL
#define DT_LSM6DSL_SPI_SELECT_SLAVE DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BASE_ADDRESS
#define DT_LSM6DSL_SPI_MASTER_DEV_NAME DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BUS_NAME
#define DT_LSM6DSL_SPI_BUS_FREQ DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_SPI_MAX_FREQUENCY
#define DT_LSM6DSL_GPIO_DEV_NAME DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_CONTROLLER
#define DT_LSM6DSL_GPIO_PIN_NUM DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_PIN

#define CONFIG_LP3943_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL
#define CONFIG_LP3943_I2C_ADDRESS ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS
#define CONFIG_LP3943_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME
#define CONFIG_LP3943_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL
#define CONFIG_LP3943_I2C_ADDRESS DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS
#define CONFIG_LP3943_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME
4 changes: 2 additions & 2 deletions boards/arm/96b_carbon/dts_fixup.h
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Expand Up @@ -8,5 +8,5 @@
#define CONFIG_BT_SPI_IRQ_PIN BT_IRQ_GPIOS_PIN
#define CONFIG_BT_SPI_RESET_DEV_NAME BT_RESET_GPIOS_CONTROLLER
#define CONFIG_BT_SPI_RESET_PIN BT_RESET_GPIOS_PIN
#define CONFIG_BT_SPI_DEV_NAME ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_BUS_NAME
#define CONFIG_BT_SPI_MAX_CLK_FREQ ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_SPI_MAX_FREQUENCY
#define CONFIG_BT_SPI_DEV_NAME DT_ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_BUS_NAME
#define CONFIG_BT_SPI_MAX_CLK_FREQ DT_ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_SPI_MAX_FREQUENCY
6 changes: 3 additions & 3 deletions boards/arm/96b_neonkey/dts_fixup.h
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Expand Up @@ -4,6 +4,6 @@
* generated data matches the driver definitions.
*/

#define CONFIG_LP3943_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL
#define CONFIG_LP3943_I2C_ADDRESS ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS
#define CONFIG_LP3943_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME
#define CONFIG_LP3943_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL
#define CONFIG_LP3943_I2C_ADDRESS DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS
#define CONFIG_LP3943_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME
30 changes: 15 additions & 15 deletions boards/arm/adafruit_feather_m0_basic_proto/pinmux.c
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Expand Up @@ -9,54 +9,54 @@

static int board_pinmux_init(struct device *dev)
{
struct device *muxa = device_get_binding(CONFIG_PINMUX_SAM0_A_LABEL);
#if CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS
struct device *muxb = device_get_binding(CONFIG_PINMUX_SAM0_B_LABEL);
struct device *muxa = device_get_binding(DT_PINMUX_SAM0_A_LABEL);
#if DT_SPI_SAM0_SERCOM4_BASE_ADDRESS
struct device *muxb = device_get_binding(DT_PINMUX_SAM0_B_LABEL);
#endif
ARG_UNUSED(dev);

#if CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM0_BASE_ADDRESS
/* SERCOM0 on RX=PA11/pad 3, TX=PA10/pad 2 */
pinmux_pin_set(muxa, 11, PINMUX_FUNC_C);
pinmux_pin_set(muxa, 10, PINMUX_FUNC_C);
#endif

#if CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM1_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM2_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM3_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM4_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM5_BASE_ADDRESS
#error Pin mapping is not configured
#endif

#if CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM4_BASE_ADDRESS
/* SPI SERCOM4 on MISO=PA12/pad 0, MOSI=PB10/pad 2, SCK=PB11/pad 3 */
pinmux_pin_set(muxa, 12, PINMUX_FUNC_D);
pinmux_pin_set(muxb, 10, PINMUX_FUNC_D);
pinmux_pin_set(muxb, 11, PINMUX_FUNC_D);
#endif

#if CONFIG_SPI_SAM0_SERCOM0_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM0_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM1_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM1_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM2_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM2_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM3_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM3_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM5_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM5_BASE_ADDRESS
#error Pin mapping is not configured
#endif

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26 changes: 13 additions & 13 deletions boards/arm/adafruit_trinket_m0/pinmux.c
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Original file line number Diff line number Diff line change
Expand Up @@ -9,58 +9,58 @@

static int board_pinmux_init(struct device *dev)
{
struct device *muxa = device_get_binding(CONFIG_PINMUX_SAM0_A_LABEL);
struct device *muxa = device_get_binding(DT_PINMUX_SAM0_A_LABEL);

ARG_UNUSED(dev);

#if CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM0_BASE_ADDRESS
/* SERCOM0 on RX=PA7/pad 3, TX=PA6/pad 2 */
pinmux_pin_set(muxa, 7, PINMUX_FUNC_D);
pinmux_pin_set(muxa, 6, PINMUX_FUNC_D);
#endif

#if CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM2_BASE_ADDRESS
/* SERCOM2 on RX=PA9/pad 1, TX=PA8/pad 0 */
pinmux_pin_set(muxa, 9, PINMUX_FUNC_D);
pinmux_pin_set(muxa, 8, PINMUX_FUNC_D);
#endif

#if CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM1_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM3_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM4_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS
#if DT_UART_SAM0_SERCOM5_BASE_ADDRESS
#error Pin mapping is not configured
#endif

#if CONFIG_SPI_SAM0_SERCOM0_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM0_BASE_ADDRESS
/* SPI SERCOM0 on MISO=PA9/pad 1, MOSI=PA6/pad 2, SCK=PA7/pad 3 */
pinmux_pin_set(muxa, 9, PINMUX_FUNC_D);
pinmux_pin_set(muxa, 6, PINMUX_FUNC_D);
pinmux_pin_set(muxa, 7, PINMUX_FUNC_D);
#endif

#if CONFIG_SPI_SAM0_SERCOM1_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM1_BASE_ADDRESS
/* SPI SERCOM1 on MOSI=PA0/pad 0, SCK=PA1/pad 1 */
pinmux_pin_set(muxa, 0, PINMUX_FUNC_D);
pinmux_pin_set(muxa, 1, PINMUX_FUNC_D);
#endif

#if CONFIG_SPI_SAM0_SERCOM2_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM2_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM3_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM3_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM4_BASE_ADDRESS
#error Pin mapping is not configured
#endif
#if CONFIG_SPI_SAM0_SERCOM5_BASE_ADDRESS
#if DT_SPI_SAM0_SERCOM5_BASE_ADDRESS
#error Pin mapping is not configured
#endif

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