zephyrproject-rtos · dleach02 · Mar 25, 2022 · Mar 15, 2022 · Mar 25, 2022
diff --git a/mcux/mcux-sdk/.github/ISSUE_TEMPLATE/bug_report.md b/mcux/mcux-sdk/.github/ISSUE_TEMPLATE/bug_report.md
@@ -8,26 +8,35 @@ assignees: ''
 ---
 
 **Describe the bug**
+<!--
 A clear and concise description of what the bug is.
+-->
 
 **To Reproduce**
-* Environment (please complete the following information):
-   - Tag/Commit hash: [e.g. MCUX_2.9.0]
-   - Toolchain: [e.g. ARMGCC 9-2020-q2-update]
-   - Board/SoC: [e.g. FRDM-K64F]
-   - Example [e.g. adc16_interrupt]  
-* Steps to reproduce the behavior:
+
+- Environment (please complete the following information):
+  - Tag/Commit hash: [e.g. MCUX_2.9.0]
+  - Toolchain: [e.g. ARMGCC 9-2020-q2-update]
+  - Board/SoC: [e.g. FRDM-K64F]
+  - Example [e.g. adc16_interrupt]
+- Steps to reproduce the behavior:
   Below uses adc16_interrupt example ARMGCC run issue on frdm-k64f as an example, you may follow similar description.
   1. cd frdmk64f\driver_examples\adc16\interrupt\armgcc
   2. [optional] If modified code is needed, please provide the modified code snippet.
   3. Run build_debug.bat to build example, see error. Skip the below steps for run error.
   4. Connect frdmk64f board to PC and do set up follow the description in frdmk64f\driver_examples\adc16\interrupt\readme.txt. Refer to the guide running a ARMGCC demo to download and run the example, see error in console output.
 
 **Expected behavior**
+<!--
 A clear and concise description of what you expected to happen.
+-->
 
 **Screenshots and console output**
+<!--
 If applicable, add screenshots and paste your console output to help explain your problem. If the error information is captured by other tools such as Oscilloscope, logic analyzer or wireshark, please share us the screenshot of these information which could help the progress.
+-->
 
 **Additional context**
+<!--
 Add any other context about the problem here.
+-->
diff --git a/mcux/mcux-sdk/.github/ISSUE_TEMPLATE/enhancement.md b/mcux/mcux-sdk/.github/ISSUE_TEMPLATE/enhancement.md
@@ -8,13 +8,21 @@ assignees: ''
 ---
 
 **Is your enhancement proposal related to a problem? Please describe.**
+<!--
 A clear and concise description of what the problem is.
+-->
 
 **Describe the solution you'd like**
+<!--
 A clear and concise description of what you want to happen.
+-->
 
 **Describe alternatives you've considered**
+<!--
 A clear and concise description of any alternative solutions or features you've considered.
+-->
 
 **Additional context**
+<!--
 Add any other context or graphics (drag-and-drop an image) about the feature request here.
+-->
diff --git a/mcux/mcux-sdk/.github/PULL_REQUEST_TEMPLATE.md b/mcux/mcux-sdk/.github/PULL_REQUEST_TEMPLATE.md
@@ -1,4 +1,5 @@
 **Prerequisites**
+
 - [ ] I have checked latest main branch and the issue still exists.
 - [ ] I did not see it is stated as known-issue in release notes.
 - [ ] No similar GitHub issue is related to this change.
@@ -8,12 +9,16 @@
 - [ ] I have added tests that prove my fix is effective or that my feature works.
 
 **Describe the pull request**
-
-A clear and concise description for the change in this Pull Request and which issue is fixed. 
+<!--
+A clear and concise description for the change in this Pull Request and which issue is fixed.
 
 Fixes # (issue)
+-->
 
-**Type of change** (please delete options that are not relevant):
+**Type of change**
+<!--
+(please delete options that are not relevant)
+-->
 
 - [ ] Bug fix (non-breaking change which fixes an issue)
 - [ ] New feature (non-breaking change which adds functionality)
@@ -22,13 +27,12 @@ Fixes # (issue)
 
 **Tests**
 
-* Test configuration (please complete the following information):
-   - Hardware setting:
-   - Toolchain:
-   - Test Tool preparation:
-   - Any other dependencies:
-* Test executed
-  Please describe the tests that you ran to verify your changes. Provide instructions so we can reproduce. 
-    - [ ] Build Test
-    - [ ] Run Test
-
+- Test configuration (please complete the following information):
+  - Hardware setting:
+  - Toolchain:
+  - Test Tool preparation:
+  - Any other dependencies:
+- Test executed
+  Please describe the tests that you ran to verify your changes. Provide instructions so we can reproduce.
+  - [ ] Build Test
+  - [ ] Run Test
diff --git a/mcux/mcux-sdk/CMSIS/Core/Include/core_cm7.h b/mcux/mcux-sdk/CMSIS/Core/Include/core_cm7.h
@@ -2317,14 +2317,6 @@ __STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isiz
   #endif
 }
 
-/*
- * Optimize the Data Cache functions, for the endless loop issue.
- * More details, see https://github.com/ARM-software/CMSIS_5/issues/620
- */
-#if (defined(__GNUC__) && !defined(__OPTIMIZE__))
-#pragma GCC push_options
-#pragma GCC optimize ("Og")
-#endif
 
 /**
   \brief   Enable D-Cache
@@ -2385,6 +2377,25 @@ __STATIC_FORCEINLINE void SCB_DisableDCache (void)
 
     ccsidr = SCB->CCSIDR;
 
+  #if (defined(__GNUC__) && !defined(__OPTIMIZE__))
+    /*
+     * For the endless loop issue with GCC O0.
+     * More details, see https://github.com/ARM-software/CMSIS_5/issues/620
+     *
+     * The issue only happens when local variables are in stack (GCC O0). If
+     * local variables are saved in general purpose register, then the function
+     * is OK.
+     *
+     * When local variables are in stack, after disabling the cache, flush the
+     * local variables cache line for data consistency.
+     */
+    /* Clean and invalidate the local variable cache. */
+    SCB->DCCIMVAC = (uint32_t)(&sets);
+    SCB->DCCIMVAC = (uint32_t)(&ways);
+    SCB->DCCIMVAC = (uint32_t)(&ccsidr);
+    __DSB();
+    __ISB();
+  #endif
                                             /* clean & invalidate D-Cache */
     sets = (uint32_t)(CCSIDR_SETS(ccsidr));
     do {
@@ -2508,9 +2519,6 @@ __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
   #endif
 }
 
-#if (defined(__GNUC__) && !defined(__OPTIMIZE__))
-#pragma GCC pop_options
-#endif
 
 /**
   \brief   D-Cache Invalidate by address

diff --git a/mcux/mcux-sdk/CMSIS/Core_A/Include/CMSIS_Include_core_ca.cmake b/mcux/mcux-sdk/CMSIS/Core_A/Include/CMSIS_Include_core_ca.cmake
@@ -0,0 +1,12 @@
+#Description: CMSIS Include For Cortex-A; user_visible: True
+include_guard(GLOBAL)
+message("CMSIS_Include_core_ca component is included.")
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/../Source/mmu_armv8a.c
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/.
+)
+
diff --git a/mcux/mcux-sdk/CMSIS/Core_A/Include/cmsis_compiler.h b/mcux/mcux-sdk/CMSIS/Core_A/Include/cmsis_compiler.h
@@ -0,0 +1,92 @@
+/**************************************************************************//**
+ * @file     cmsis_gcc.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V1.0.0
+ * @date     05. october 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright 2021 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#if   defined ( __ICCARM__ )
+ #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#include <stdint.h>
+#include <string.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Define compiler macros for CPU architecture, if not yet defined by the
+ * compiler default macros
+ */
+#if __ARM_ARCH_8A__
+/* Macro already defined */
+#else
+  #if defined(__ARM_ARCH_8A) && __ARM_ARCH_8A == 1
+    #define __ARM_ARCH_8A__ 1
+  #endif /* __ARM_ARCH_8A == 1 */
+#endif
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #include "cmsis_gcc.h"
+
+#elif defined ( __ICCARM__ )
+  #include "cmsis_iar.h"
+
+#else
+  #error Unknown compiler
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+#define RESERVED(N, T) T RESERVED##N;    // placeholder struct members used for "reserved" areas
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CMSIS_COMPILER_H */