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FIR-172: Added Devic Tree entry to reserve 0x7F00_0000 to 0x7FFF_FFFF #4

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Merged
merged 1 commit into from
Oct 1, 2024
Merged

FIR-172: Added Devic Tree entry to reserve 0x7F00_0000 to 0x7FFF_FFFF #4

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6 changes: 6 additions & 0 deletions arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,12 @@
alignment = <0x1000>;
no-map;
};
service_reserved1: svcbuffer@1 {
compatible = "shared-dma-pool";
reg = <0x0 0x7F000000 0x0 0x7FFFFFFF>;
alignment = <0x1000>;
no-map;
};
};

cpus {
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28 changes: 0 additions & 28 deletions arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -41,34 +41,6 @@
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};

/*reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;*/
/* global autoconfigured region for contiguous allocations */
/*linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x200000>;
alignment = <0x2000>;
linux,cma-default;
};*/

/* current allocation is 2 MB from 0x7F00_0000 to 0x7F1F_FFFF
* these allocaiton will change when we add more TXEs and standardize on
* the space every TXE needs
*/
/* display_reserved: framebuffer@7F000000 {
reg = <0x7F000000 0x100000>;
};

restricted_dma_reserved: restricted-dma-pool@FF1000000 {
compatible = "restricted-dma-pool";
reg = <0x7F100000 0x100000>;
};
};*/

};

&gpio1 {
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