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@zfields zfields commented Sep 26, 2025

Add default pins for Serial2 instance.

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Add default pins for Serial2 instance.

Signed-off-by: Zachary J. Fields <[email protected]>
@zfields zfields changed the title Define default pins for Serial2 Define default pins for Cygnet/Swan Serial2 Sep 26, 2025
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zfields commented Sep 29, 2025

Thank you for the correction! I will get them fixed.

I think I went wrong, because I tested this out on hardware, and it appeared to work correctly. 🤯

Can you explain why it "worked" even though I was wrong, and where should I be looking to know if the standard or _ALT1 version of pins should be used instead?

I don't want to continue to make these errors as we evolve our product.

Thank you again!

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fpistm commented Oct 2, 2025

I think I went wrong, because I tested this out on hardware, and it appeared to work correctly. 🤯

Can you explain why it "worked" even though I was wrong,

Of course it work but with LPUART1 not USART2 as you expected 😉

and where should I be looking to know if the standard or _ALT1 version of pins should be used instead?

To sum up a pin (GPIO) can have several peripherals and also several instance of one type of peripheral.

You can find in the datasheet all alternate functions of one pin:
image

The PeripheralPins.c simply list all possible values per features.
Example for PA2:

{PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // - A2
{PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // - A2

In this case we found the 2 possibilities for serial Tx and the required alternate function (AF):
GPIO_AF8_LPUART1 or GPIO_AF7_USART2.
To be able to select the one we want for PA2, the suffix ALTx (for ALTernative), pay attention it is different of the alternate function.
It only allows to get the right entry in the table and then configure the GPIO pin accordingly.

As you already defined a dedicated PeripheralPins for your boards, I advise to simply kept the instance you want:

-  {PA_2,      LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // - A2
-  {PA_2_ALT1, USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},  // - A2
+  // {PA_2,      LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // - A2
+  {PA_2      , USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},  // - A2

Signed-off-by: Zachary J. Fields <[email protected]>
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zfields commented Oct 3, 2025

I've updated to use PA2_ALT1 and PA3_ALT1.

Defined here:
https://github.com/zfields/Arduino_Core_STM32/blob/patch-2/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.h#L63-L64

@fpistm fpistm added the enhancement New feature or request label Oct 6, 2025
@fpistm fpistm added this to the 2.11.1/2.12.0 milestone Oct 6, 2025
…iant_SWAN_R5.h

Co-authored-by: Frederic Pillon <[email protected]>
Signed-off-by: Zachary J. Fields <[email protected]>
@github-project-automation github-project-automation bot moved this from In progress to Reviewer approved in STM32 core based on ST HAL Oct 7, 2025
@fpistm fpistm changed the title Define default pins for Cygnet/Swan Serial2 Define default pins for Cygnet/Swan Serial2/3 Oct 7, 2025
@fpistm fpistm merged commit 9cc7f13 into stm32duino:main Oct 7, 2025
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@github-project-automation github-project-automation bot moved this from Reviewer approved to Done in STM32 core based on ST HAL Oct 7, 2025
@zfields zfields deleted the patch-2 branch October 7, 2025 15:17
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