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Summary of the PR

  • Return riscv_sbi to VMM for further process.
  • Add test for KVM_EXIT_RISCV_SBI exit.

Requirements

Before submitting your PR, please make sure you addressed the following
requirements:

  • All commits in this PR have Signed-Off-By trailers (with
    git commit -s), and the commit message has max 60 characters for the
    summary and max 75 characters for each description line.
  • All added/changed functionality has a corresponding unit/integration
    test.
  • All added/changed public-facing functionality has entries in the "Upcoming
    Release" section of CHANGELOG.md (if no such section exists, please create one).
  • Any newly added unsafe code is properly documented.

.sum();
assert_eq!(dirty_pages, 1);
break;
break;
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Why indent here, make sure you ran cargo fmt before proceeding to next commit 🙂

#[cfg(target_arch = "riscv64")]
#[test]
fn test_run_code() {
use sbi_spec::legacy::*;
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If you want to use external crate sbi_spec solely in test module, dev-dependencies are the section for them. Honestly I don't think we really need this 🙂

Comment on lines +2587 to +2604
//sbi_console_getchar
0x01, 0x45, // li a0, 0
0x81, 0x45, // li a1, 0
0x01, 0x46, // li a2, 0
0x81, 0x46, // li a3, 0
0x01, 0x47, // li a4, 0
0x81, 0x47, // li a5, 0
0x01, 0x48, // li a6, 0
0x89, 0x48, // li a7, 2
0x73, 0x00, 0x00, 0x00, //ecall
//sbi_console_putchar
0x81, 0x45, // li a1, 0
0x01, 0x46, // li a2, 0
0x81, 0x46, // li a3, 0
0x01, 0x47, // li a4, 0
0x81, 0x47, // li a5, 0
0x01, 0x48, // li a6, 0
0x85, 0x48, // li a7, 1
0x73, 0x00, 0x00, 0x00, //ecall
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The test_run_code is failing in our CI

Comment on lines 2680 to 2686
LEGACY_CONSOLE_GETCHAR => {
// SAFETY: Safe because the extension_id (which comes from the kernel) told us
// ow to use riscv_sbi
let ch = &mut riscv_sbi.ret[..1];
ch[0] = 0x2a;
}
LEGACY_CONSOLE_PUTCHAR => {
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If the two constants are all you need from sbi_spec, you can simply write them explicitly with a comment

## Upcoming Release

- Plumb through KVM_CAP_DIRTY_LOG_RING as DirtyLogRing cap.
- Return riscv_sbi to VMM for further process.
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Please refer to other entries to document PR number and link as well

Return riscv_sbi to VMM for further process.

Signed-off-by: BillXiang <[email protected]>
}
VcpuExit::RiscvSbi(riscv_sbi) => {
match riscv_sbi.extension_id as usize {
LEGACY_CONSOLE_GETCHAR => {
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I would favor something like

// Constants taken from qemu/target/riscv/sbi_ecall_interface.h
1 /* SBI_EXT_0_1_CONSOLE_PUTCHAR */ => ...

here and drop sbi_spec

@BillXiang BillXiang force-pushed the riscv64_sbi branch 2 times, most recently from 6068910 to 8a07d53 Compare September 30, 2025 09:19
BillXiang added 2 commits September 30, 2025 17:28
Introduce sbi-spec and add tests for LEGACY_CONSOLE_GETCHAR and LEGACY_CONSOLE_PUTCHAR.

Signed-off-by: BillXiang <[email protected]>
Signed-off-by: BillXiang <[email protected]>
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Code-wise looking good to me, thanks @BillXiang for your patience

Could you work out the tests? Is it working locally?

@BillXiang
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Thanks for the review, @RuoqingHe. As noted earlier, the CI image fails because CONFIG_RISCV_SBI_V01 is disabled; I’ve enabled it in riscv64/build_kernel.sh via #140.

@RuoqingHe
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Thanks for the review, @RuoqingHe. As noted earlier, the CI image fails because CONFIG_RISCV_SBI_V01 is disabled; I’ve enabled it in riscv64/build_kernel.sh via #140.

Yes, I noticed that

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2 participants