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@Kmeakin Kmeakin commented Aug 6, 2025

Instead of separately checking for end == usize::MAX and end + 1 > slice.len(), we can check for end >= slice.len(). Also consolidate all the slice indexing related panic functions into a single function which reports the correct error depending on the arguments, as the str indexing code already does.

The downside of all this is that the panic message is slightly less specific when trying to index with [..=usize::MAX]: instead of saying "attempted to index slice up to maximum usize" it just says "range end index {end} out of range for slice of length {len}". But this is a rare enough case that I think it is acceptable

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r? @ibraheemdev

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As you saw from the PR build failure, if you're touching things like slice_index_order_fail you'll need to look through every mention of those in the repo -- there are a bunch of codegen tests that look for their absence, and you need to make sure that you don't make those tests useless by renaming what they're looking for.

(You probably also need to re-bless some MIR tests that include indexing.)

@jieyouxu jieyouxu added S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Aug 7, 2025
@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from eab010d to 61bcd82 Compare August 8, 2025 00:40
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@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 2546221 to a61fde0 Compare August 9, 2025 00:09
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rustbot commented Aug 9, 2025

The Miri subtree was changed

cc @rust-lang/miri

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@rustbot rustbot added the has-merge-commits PR has merge commits, merge with caution. label Aug 9, 2025
@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 48b325f to 87a3889 Compare August 9, 2025 00:16
@rustbot rustbot removed has-merge-commits PR has merge commits, merge with caution. S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. labels Aug 9, 2025
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@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 87a3889 to bd63d02 Compare August 9, 2025 19:16
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oli-obk commented Aug 9, 2025

@bors try @rust-timer queue

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rust-bors bot added a commit that referenced this pull request Aug 9, 2025
Optimize indexing slices and strs with inclusive ranges
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rust-bors bot commented Aug 9, 2025

⌛ Trying commit bd63d02 with merge 4249615

To cancel the try build, run the command @bors try cancel.

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@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from bd63d02 to 194cfc3 Compare August 9, 2025 22:13
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Kmeakin commented Aug 23, 2025

@rustbot ready

@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. and removed S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. labels Aug 23, 2025
@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 03fdbbd to 7bc62e2 Compare August 25, 2025 00:12
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github-actions bot pushed a commit to model-checking/verify-rust-std that referenced this pull request Aug 26, 2025
…nicking, r=jhpratt

Consolidate panicking functions in `slice/index.rs`

Consolidate all the panicking functions in `slice/index.rs` to use a single `slice_index_fail` function, similar to how it is done in `str/traits.rs`.

Split off from rust-lang#145024
@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 7bc62e2 to 6f5164d Compare October 6, 2025 21:18
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@Kmeakin Kmeakin requested a review from scottmcm October 6, 2025 21:19
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Kmeakin commented Oct 10, 2025

@ibraheemdev ping?

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This doesn't seem to be an improvement, but I'll pass it along for a second look. r? libs

@rustbot rustbot assigned joboet and unassigned ibraheemdev Oct 14, 2025
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I do like the plan of not handling MAX separately, if we can naturally have it handled by the normal check against len(). This definitely isn't the kind of place where we're trying to use overflow flags from the addition to do a check.

That said, I'd like to see some kind of codegen-related testing that demonstrates this coalescing the length checks together. The check for overflow is at least incredibly predictable, so if this change doesn't remove a check then it's potentially slightly worse.

Maybe a codegen-llvm test showing slice[0..=i] or slice[j..=k]? (I thought we had a mir-opt test that this would have changed, but I guess not 😕)

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@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 6f5164d to 7e8cf44 Compare October 18, 2025 03:22
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Add a `codegen-llvm` test to check the number of `icmp` instrucitons
generated for each `SliceIndex` method on the various range types. This
will be updated in the next commit when `SliceIndex::get` is optimized
for `RangeInclusive`.
The check for `self.end() == usize::MAX` can be combined with the
`self.end() + 1 > slice.len()` check into `self.end() >= slice.len()`,
since `self.end() < slice.len()` implies both
`self.end() <= slice.len()` and `self.end() < usize::MAX`.
Same reasoning as previous commit.
@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 7e8cf44 to 466066b Compare October 20, 2025 22:52
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rustbot commented Oct 20, 2025

This PR was rebased onto a different master commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

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Same reasoning as previous two commits.
@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 466066b to 62172c4 Compare October 21, 2025 00:08
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@Kmeakin Kmeakin force-pushed the km/optimize-slice-index/v3 branch from 62172c4 to d2b6a1d Compare October 21, 2025 23:57
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The job aarch64-gnu-llvm-20-1 failed! Check out the build log: (web) (plain enhanced) (plain)

Click to see the possible cause of the failure (guessed by this bot)

---- [codegen] tests/codegen-llvm/slice-range-indexing.rs stdout ----
------FileCheck stdout------------------------------

------FileCheck stderr------------------------------
/checkout/tests/codegen-llvm/slice-range-indexing.rs:76:15: error: CHECK-NOT: excluded string found in input
// CHECK-NOT: %{{.+}} = icmp
              ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/codegen-llvm/slice-range-indexing/slice-range-indexing.ll:178:2: note: found here
 %_7.not = icmp ugt i64 %_6.0, %slice.1
 ^~~~~~~~~~~~~~

Input file: /checkout/obj/build/aarch64-unknown-linux-gnu/test/codegen-llvm/slice-range-indexing/slice-range-indexing.ll
Check file: /checkout/tests/codegen-llvm/slice-range-indexing.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
        .
        .
        .
       78: start: 
       79:  %_8 = icmp ult i64 %slice.1, %range 
       80:  %_9 = sub nuw i64 %slice.1, %range 
       81:  %_11 = getelementptr inbounds nuw i32, ptr %slice.0, i64 %range 
       82:  %_0.sroa.3.0 = select i1 %_8, i64 undef, i64 %_9 
       83:  %_0.sroa.0.0 = select i1 %_8, ptr null, ptr %_11 
       84:  %0 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0 
       85:  %1 = insertvalue { ptr, i64 } %0, i64 %_0.sroa.3.0, 1 
       86:  ret { ptr, i64 } %1 
       87: } 
       88:  
       89: ; Function Attrs: uwtable 
       90: define { ptr, i64 } @index_range_from(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, i64 noundef %range) unnamed_addr #1 { 
       91: start: 
       92:  %_3 = icmp ugt i64 %range, %slice.1 
       93:  br i1 %_3, label %bb1, label %bb2, !prof !3 
       94:  
       95: bb2: ; preds = %start 
       96:  %_6 = sub nuw i64 %slice.1, %range 
       97:  %_10 = getelementptr inbounds nuw i32, ptr %slice.0, i64 %range 
       98:  %0 = insertvalue { ptr, i64 } poison, ptr %_10, 0 
       99:  %1 = insertvalue { ptr, i64 } %0, i64 %_6, 1 
      100:  ret { ptr, i64 } %1 
      101:  
      102: bb1: ; preds = %start 
      103: ; call core::slice::index::slice_index_fail 
      104:  tail call void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef %range, i64 noundef %slice.1, i64 noundef %slice.1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_26beb97b2e8e6ceee7ec6f34ae56d457) #5 
      105:  unreachable 
      106: } 
      107:  
      108: ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable 
      109: define { ptr, i64 } @get_range_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, ptr noalias nocapture noundef readonly align 8 dereferenceable(24) %range) unnamed_addr #2 { 
      110: start: 
      111:  %_16 = load i64, ptr %range, align 8, !noundef !4 
      112:  %_3.not = icmp ult i64 %_16, %slice.1 
      113:  br i1 %_3.not, label %bb2, label %bb3 
      114:  
      115: bb2: ; preds = %start 
      116:  %0 = getelementptr inbounds nuw i8, ptr %range, i64 8 
      117:  %1 = load i8, ptr %0, align 8, !range !5, !noundef !4 
      118:  %_17 = trunc nuw i8 %1 to i1 
      119:  %2 = getelementptr inbounds nuw i8, ptr %range, i64 16 
      120:  %3 = load i64, ptr %2, align 8, !noundef !4 
      121:  %_6.0 = add nuw i64 %_16, 1 
      122:  %spec.select = select i1 %_17, i64 %_6.0, i64 %3 
      123:  %_11 = icmp ult i64 %_6.0, %spec.select 
      124:  br i1 %_11, label %bb3, label %bb7 
      125:  
      126: bb7: ; preds = %bb2 
      127:  %_12 = sub nuw i64 %_6.0, %spec.select 
      128:  %_14 = getelementptr inbounds nuw i32, ptr %slice.0, i64 %spec.select 
      129:  br label %bb3 
      130:  
      131: bb3: ; preds = %bb2, %start, %bb7 
      132:  %_0.sroa.4.0 = phi i64 [ %_12, %bb7 ], [ undef, %start ], [ undef, %bb2 ] 
      133:  %_0.sroa.0.0 = phi ptr [ %_14, %bb7 ], [ null, %start ], [ null, %bb2 ] 
      134:  %4 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0 
      135:  %5 = insertvalue { ptr, i64 } %4, i64 %_0.sroa.4.0, 1 
      136:  ret { ptr, i64 } %5 
      137: } 
      138:  
      139: ; Function Attrs: uwtable 
      140: define { ptr, i64 } @index_range_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, ptr noalias nocapture noundef readonly align 8 dereferenceable(24) %range) unnamed_addr #1 { 
      141: start: 
      142:  tail call void @llvm.experimental.noalias.scope.decl(metadata !6) 
      143:  %0 = getelementptr inbounds nuw i8, ptr %range, i64 16 
      144:  %1 = load i64, ptr %0, align 8, !alias.scope !6, !noalias !9, !noundef !4 
      145:  %2 = load i64, ptr %range, align 8, !alias.scope !6, !noalias !9, !noundef !4 
      146:  %_7.i = icmp ult i64 %2, %slice.1 
      147:  br i1 %_7.i, label %bb1.i, label %bb7.i, !prof !12 
      148:  
      149: bb1.i: ; preds = %start 
      150:  %3 = getelementptr inbounds nuw i8, ptr %range, i64 8 
      151:  %4 = load i8, ptr %3, align 8, !range !5, !alias.scope !6, !noalias !9, !noundef !4 
      152:  %exhausted.i = trunc nuw i8 %4 to i1 
      153:  %_9.0.i = add nuw i64 %2, 1 
      154:  %spec.select.i = select i1 %exhausted.i, i64 %_9.0.i, i64 %1 
      155:  %_17.i = icmp ult i64 %_9.0.i, %spec.select.i 
      156:  br i1 %_17.i, label %bb7.i, label %"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit", !prof !3 
      157:  
      158: bb7.i: ; preds = %bb1.i, %start 
      159:  %end.sroa.0.0.i = phi i64 [ %2, %start ], [ %_9.0.i, %bb1.i ] 
      160:  %start1.sroa.0.0.i = phi i64 [ %1, %start ], [ %spec.select.i, %bb1.i ] 
      161: ; call core::slice::index::slice_index_fail 
      162:  tail call void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef %start1.sroa.0.0.i, i64 noundef %end.sroa.0.0.i, i64 noundef %slice.1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_1369e0138783be84742f69a6aadf88a4) #5, !noalias !13 
      163:  unreachable 
      164:  
      165: "_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit": ; preds = %bb1.i 
      166:  %_18.i = sub nuw i64 %_9.0.i, %spec.select.i 
      167:  %_20.i = getelementptr inbounds nuw i32, ptr %slice.0, i64 %spec.select.i 
      168:  %5 = insertvalue { ptr, i64 } poison, ptr %_20.i, 0 
      169:  %6 = insertvalue { ptr, i64 } %5, i64 %_18.i, 1 
      170:  ret { ptr, i64 } %6 
      171: } 
      172:  
      173: ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable 
      174: define { ptr, i64 } @get_range_to_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, i64 noundef %range) unnamed_addr #0 { 
      175: start: 
      176:  %_3.not = icmp ult i64 %range, %slice.1 
      177:  %_6.0 = add i64 %range, 1 
      178:  %_7.not = icmp ugt i64 %_6.0, %slice.1 
not:76      !~~~~~~~~~~~~~                          error: no match expected
      179:  %spec.select1 = select i1 %_7.not, ptr null, ptr %slice.0 
      180:  %_0.sroa.0.0 = select i1 %_3.not, ptr %spec.select1, ptr null 
      181:  %0 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0 
      182:  %1 = insertvalue { ptr, i64 } %0, i64 %_6.0, 1 
      183:  ret { ptr, i64 } %1 
      184: } 
      185:  
      186: ; Function Attrs: uwtable 
      187: define { ptr, i64 } @index_range_to_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, i64 noundef %range) unnamed_addr #1 { 
      188: start: 
      189:  %_7.i = icmp ult i64 %range, %slice.1 
      190:  br i1 %_7.i, label %"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit", label %bb7.i, !prof !12 
      191:  
      192: bb7.i: ; preds = %start 
      193: ; call core::slice::index::slice_index_fail 
      194:  tail call void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef 0, i64 noundef %range, i64 noundef %slice.1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_c6d4bbb739124e8ee47f4a412d3fb455) #5, !noalias !14 
      195:  unreachable 
      196:  
      197: "_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit": ; preds = %start 
      198:  %_9.0.i = add nuw i64 %range, 1 
      199:  %0 = insertvalue { ptr, i64 } poison, ptr %slice.0, 0 
      200:  %1 = insertvalue { ptr, i64 } %0, i64 %_9.0.i, 1 
      201:  ret { ptr, i64 } %1 
      202: } 
      203:  
      204: ; core::slice::index::slice_index_fail 
      205: ; Function Attrs: cold noinline noreturn uwtable 
      206: declare void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef, i64 noundef, i64 noundef, ptr noalias noundef readonly align 8 dereferenceable(24)) unnamed_addr #3 
      207:  
      208: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) 
      209: declare void @llvm.experimental.noalias.scope.decl(metadata) #4 
      210:  
      211: attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      212: attributes #1 = { uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      213: attributes #2 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      214: attributes #3 = { cold noinline noreturn uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      215: attributes #4 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } 
      216: attributes #5 = { noreturn } 
      217:  
      218: !llvm.module.flags = !{!0} 
      219: !llvm.ident = !{!1} 
      220:  
      221: !0 = !{i32 8, !"PIC Level", i32 2} 
      222: !1 = !{!"rustc version 1.92.0-nightly (36f7350af 2025-10-21)"} 
      223: !2 = !{!"branch_weights", i32 4001, i32 4000000} 
      224: !3 = !{!"branch_weights", !"expected", i32 1, i32 2000} 
      225: !4 = !{} 
      226: !5 = !{i8 0, i8 2} 
      227: !6 = !{!7} 
      228: !7 = distinct !{!7, !8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %self"} 
      229: !8 = distinct !{!8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE"} 
      230: !9 = !{!10, !11} 
      231: !10 = distinct !{!10, !8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %slice.0"} 
      232: !11 = distinct !{!11, !8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: argument 2"} 
      233: !12 = !{!"branch_weights", !"expected", i32 2000, i32 1} 
      234: !13 = !{!7, !10} 
      235: !14 = !{!15, !17} 
      236: !15 = distinct !{!15, !16, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %self"} 
      237: !16 = distinct !{!16, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE"} 
      238: !17 = distinct !{!17, !16, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %slice.0"} 
>>>>>>

------------------------------------------

error: verification with 'FileCheck' failed
status: exit status: 1
command: "/usr/lib/llvm-20/bin/FileCheck" "--input-file" "/checkout/obj/build/aarch64-unknown-linux-gnu/test/codegen-llvm/slice-range-indexing/slice-range-indexing.ll" "/checkout/tests/codegen-llvm/slice-range-indexing.rs" "--check-prefix=CHECK" "--allow-unused-prefixes" "--dump-input-context" "100"
stdout: none
--- stderr -------------------------------
/checkout/tests/codegen-llvm/slice-range-indexing.rs:76:15: error: CHECK-NOT: excluded string found in input
// CHECK-NOT: %{{.+}} = icmp
              ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/codegen-llvm/slice-range-indexing/slice-range-indexing.ll:178:2: note: found here
 %_7.not = icmp ugt i64 %_6.0, %slice.1
 ^~~~~~~~~~~~~~

Input file: /checkout/obj/build/aarch64-unknown-linux-gnu/test/codegen-llvm/slice-range-indexing/slice-range-indexing.ll
Check file: /checkout/tests/codegen-llvm/slice-range-indexing.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
        .
        .
        .
       78: start: 
       79:  %_8 = icmp ult i64 %slice.1, %range 
       80:  %_9 = sub nuw i64 %slice.1, %range 
       81:  %_11 = getelementptr inbounds nuw i32, ptr %slice.0, i64 %range 
       82:  %_0.sroa.3.0 = select i1 %_8, i64 undef, i64 %_9 
       83:  %_0.sroa.0.0 = select i1 %_8, ptr null, ptr %_11 
       84:  %0 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0 
       85:  %1 = insertvalue { ptr, i64 } %0, i64 %_0.sroa.3.0, 1 
       86:  ret { ptr, i64 } %1 
       87: } 
       88:  
       89: ; Function Attrs: uwtable 
       90: define { ptr, i64 } @index_range_from(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, i64 noundef %range) unnamed_addr #1 { 
       91: start: 
       92:  %_3 = icmp ugt i64 %range, %slice.1 
       93:  br i1 %_3, label %bb1, label %bb2, !prof !3 
       94:  
       95: bb2: ; preds = %start 
       96:  %_6 = sub nuw i64 %slice.1, %range 
       97:  %_10 = getelementptr inbounds nuw i32, ptr %slice.0, i64 %range 
       98:  %0 = insertvalue { ptr, i64 } poison, ptr %_10, 0 
       99:  %1 = insertvalue { ptr, i64 } %0, i64 %_6, 1 
      100:  ret { ptr, i64 } %1 
      101:  
      102: bb1: ; preds = %start 
      103: ; call core::slice::index::slice_index_fail 
      104:  tail call void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef %range, i64 noundef %slice.1, i64 noundef %slice.1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_26beb97b2e8e6ceee7ec6f34ae56d457) #5 
      105:  unreachable 
      106: } 
      107:  
      108: ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable 
      109: define { ptr, i64 } @get_range_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, ptr noalias nocapture noundef readonly align 8 dereferenceable(24) %range) unnamed_addr #2 { 
      110: start: 
      111:  %_16 = load i64, ptr %range, align 8, !noundef !4 
      112:  %_3.not = icmp ult i64 %_16, %slice.1 
      113:  br i1 %_3.not, label %bb2, label %bb3 
      114:  
      115: bb2: ; preds = %start 
      116:  %0 = getelementptr inbounds nuw i8, ptr %range, i64 8 
      117:  %1 = load i8, ptr %0, align 8, !range !5, !noundef !4 
      118:  %_17 = trunc nuw i8 %1 to i1 
      119:  %2 = getelementptr inbounds nuw i8, ptr %range, i64 16 
      120:  %3 = load i64, ptr %2, align 8, !noundef !4 
      121:  %_6.0 = add nuw i64 %_16, 1 
      122:  %spec.select = select i1 %_17, i64 %_6.0, i64 %3 
      123:  %_11 = icmp ult i64 %_6.0, %spec.select 
      124:  br i1 %_11, label %bb3, label %bb7 
      125:  
      126: bb7: ; preds = %bb2 
      127:  %_12 = sub nuw i64 %_6.0, %spec.select 
      128:  %_14 = getelementptr inbounds nuw i32, ptr %slice.0, i64 %spec.select 
      129:  br label %bb3 
      130:  
      131: bb3: ; preds = %bb2, %start, %bb7 
      132:  %_0.sroa.4.0 = phi i64 [ %_12, %bb7 ], [ undef, %start ], [ undef, %bb2 ] 
      133:  %_0.sroa.0.0 = phi ptr [ %_14, %bb7 ], [ null, %start ], [ null, %bb2 ] 
      134:  %4 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0 
      135:  %5 = insertvalue { ptr, i64 } %4, i64 %_0.sroa.4.0, 1 
      136:  ret { ptr, i64 } %5 
      137: } 
      138:  
      139: ; Function Attrs: uwtable 
      140: define { ptr, i64 } @index_range_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, ptr noalias nocapture noundef readonly align 8 dereferenceable(24) %range) unnamed_addr #1 { 
      141: start: 
      142:  tail call void @llvm.experimental.noalias.scope.decl(metadata !6) 
      143:  %0 = getelementptr inbounds nuw i8, ptr %range, i64 16 
      144:  %1 = load i64, ptr %0, align 8, !alias.scope !6, !noalias !9, !noundef !4 
      145:  %2 = load i64, ptr %range, align 8, !alias.scope !6, !noalias !9, !noundef !4 
      146:  %_7.i = icmp ult i64 %2, %slice.1 
      147:  br i1 %_7.i, label %bb1.i, label %bb7.i, !prof !12 
      148:  
      149: bb1.i: ; preds = %start 
      150:  %3 = getelementptr inbounds nuw i8, ptr %range, i64 8 
      151:  %4 = load i8, ptr %3, align 8, !range !5, !alias.scope !6, !noalias !9, !noundef !4 
      152:  %exhausted.i = trunc nuw i8 %4 to i1 
      153:  %_9.0.i = add nuw i64 %2, 1 
      154:  %spec.select.i = select i1 %exhausted.i, i64 %_9.0.i, i64 %1 
      155:  %_17.i = icmp ult i64 %_9.0.i, %spec.select.i 
      156:  br i1 %_17.i, label %bb7.i, label %"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit", !prof !3 
      157:  
      158: bb7.i: ; preds = %bb1.i, %start 
      159:  %end.sroa.0.0.i = phi i64 [ %2, %start ], [ %_9.0.i, %bb1.i ] 
      160:  %start1.sroa.0.0.i = phi i64 [ %1, %start ], [ %spec.select.i, %bb1.i ] 
      161: ; call core::slice::index::slice_index_fail 
      162:  tail call void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef %start1.sroa.0.0.i, i64 noundef %end.sroa.0.0.i, i64 noundef %slice.1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_1369e0138783be84742f69a6aadf88a4) #5, !noalias !13 
      163:  unreachable 
      164:  
      165: "_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit": ; preds = %bb1.i 
      166:  %_18.i = sub nuw i64 %_9.0.i, %spec.select.i 
      167:  %_20.i = getelementptr inbounds nuw i32, ptr %slice.0, i64 %spec.select.i 
      168:  %5 = insertvalue { ptr, i64 } poison, ptr %_20.i, 0 
      169:  %6 = insertvalue { ptr, i64 } %5, i64 %_18.i, 1 
      170:  ret { ptr, i64 } %6 
      171: } 
      172:  
      173: ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable 
      174: define { ptr, i64 } @get_range_to_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, i64 noundef %range) unnamed_addr #0 { 
      175: start: 
      176:  %_3.not = icmp ult i64 %range, %slice.1 
      177:  %_6.0 = add i64 %range, 1 
      178:  %_7.not = icmp ugt i64 %_6.0, %slice.1 
not:76      !~~~~~~~~~~~~~                          error: no match expected
      179:  %spec.select1 = select i1 %_7.not, ptr null, ptr %slice.0 
      180:  %_0.sroa.0.0 = select i1 %_3.not, ptr %spec.select1, ptr null 
      181:  %0 = insertvalue { ptr, i64 } poison, ptr %_0.sroa.0.0, 0 
      182:  %1 = insertvalue { ptr, i64 } %0, i64 %_6.0, 1 
      183:  ret { ptr, i64 } %1 
      184: } 
      185:  
      186: ; Function Attrs: uwtable 
      187: define { ptr, i64 } @index_range_to_inclusive(ptr noalias noundef nonnull readonly align 4 %slice.0, i64 noundef %slice.1, i64 noundef %range) unnamed_addr #1 { 
      188: start: 
      189:  %_7.i = icmp ult i64 %range, %slice.1 
      190:  br i1 %_7.i, label %"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit", label %bb7.i, !prof !12 
      191:  
      192: bb7.i: ; preds = %start 
      193: ; call core::slice::index::slice_index_fail 
      194:  tail call void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef 0, i64 noundef %range, i64 noundef %slice.1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @alloc_c6d4bbb739124e8ee47f4a412d3fb455) #5, !noalias !14 
      195:  unreachable 
      196:  
      197: "_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE.exit": ; preds = %start 
      198:  %_9.0.i = add nuw i64 %range, 1 
      199:  %0 = insertvalue { ptr, i64 } poison, ptr %slice.0, 0 
      200:  %1 = insertvalue { ptr, i64 } %0, i64 %_9.0.i, 1 
      201:  ret { ptr, i64 } %1 
      202: } 
      203:  
      204: ; core::slice::index::slice_index_fail 
      205: ; Function Attrs: cold noinline noreturn uwtable 
      206: declare void @_ZN4core5slice5index16slice_index_fail17hc29b46a56ac91334E(i64 noundef, i64 noundef, i64 noundef, ptr noalias noundef readonly align 8 dereferenceable(24)) unnamed_addr #3 
      207:  
      208: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) 
      209: declare void @llvm.experimental.noalias.scope.decl(metadata) #4 
      210:  
      211: attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      212: attributes #1 = { uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      213: attributes #2 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      214: attributes #3 = { cold noinline noreturn uwtable "frame-pointer"="non-leaf" "probe-stack"="inline-asm" "target-cpu"="generic" "target-features"="+v8a,+outline-atomics" } 
      215: attributes #4 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } 
      216: attributes #5 = { noreturn } 
      217:  
      218: !llvm.module.flags = !{!0} 
      219: !llvm.ident = !{!1} 
      220:  
      221: !0 = !{i32 8, !"PIC Level", i32 2} 
      222: !1 = !{!"rustc version 1.92.0-nightly (36f7350af 2025-10-21)"} 
      223: !2 = !{!"branch_weights", i32 4001, i32 4000000} 
      224: !3 = !{!"branch_weights", !"expected", i32 1, i32 2000} 
      225: !4 = !{} 
      226: !5 = !{i8 0, i8 2} 
      227: !6 = !{!7} 
      228: !7 = distinct !{!7, !8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %self"} 
      229: !8 = distinct !{!8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE"} 
      230: !9 = !{!10, !11} 
      231: !10 = distinct !{!10, !8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %slice.0"} 
      232: !11 = distinct !{!11, !8, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: argument 2"} 
      233: !12 = !{!"branch_weights", !"expected", i32 2000, i32 1} 
      234: !13 = !{!7, !10} 
      235: !14 = !{!15, !17} 
      236: !15 = distinct !{!15, !16, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %self"} 
      237: !16 = distinct !{!16, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE"} 
      238: !17 = distinct !{!17, !16, !"_ZN115_$LT$core..ops..range..RangeInclusive$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h022f28aa80590f6cE: %slice.0"} 
>>>>>>
------------------------------------------

---- [codegen] tests/codegen-llvm/slice-range-indexing.rs stdout end ----

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perf-regression Performance regression. S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-libs Relevant to the library team, which will review and decide on the PR/issue.

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