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@a4lg a4lg commented Mar 22, 2025

Of RISC-V features defined in stdarch, this commit adds ratified extensions satisfying following criteria:

  • Formerly a part of the I extension and splitted thereafter (now ratified as I + Zifencei + Zicsr + Zicntr + Zihpm) or
  • Dicoverable from newer versions of the Linux kernel (Ztso and Zihintpause).

This is based on the latest ratified ISA Manuals (version 20240411).

LLVM Definitions:

One of those, Zicsr, is a dependency of many other ISA extensions and this commit adds correct dependencies to Zicsr except V (due to ongoing PR #138742).


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@rustbot label +T-compiler +O-riscv +A-target-feature

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rustbot commented Mar 22, 2025

r? @fmease

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@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. O-riscv Target: RISC-V architecture labels Mar 22, 2025
@a4lg a4lg force-pushed the riscv-feature-addition-base-i-and-ztso branch 2 times, most recently from e7f364c to 4a8cb94 Compare March 22, 2025 03:50
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a4lg commented Mar 22, 2025

@rustbot r? @Amanieu

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a4lg commented Mar 22, 2025

Hmm, considering the minimum LLVM version, I have to remove Ztso for now (LLVM 19 stabilized support for Ztso).

Of RISC-V features defined in stdarch, this commit adds extensions
satisfying following criteria:

*   Formerly a part of the "I" extension and splitted thereafter
    (now ratified as "I" + "Zifencei" + "Zicsr" + "Zicntr" + "Zihpm") or
*   Dicoverable from newer versions of the Linux kernel ("Zihintpause").

This is based on the latest ratified ISA Manuals (version 20240411).

One of those, "Zicsr", is a dependency of many other ISA extensions and
this commit adds correct dependencies to "Zicsr" except "V"
(due to an ongoing PR).
@a4lg a4lg force-pushed the riscv-feature-addition-base-i-and-ztso branch from 4a8cb94 to 1649e52 Compare March 22, 2025 04:38
@a4lg a4lg closed this Mar 22, 2025
@a4lg a4lg deleted the riscv-feature-addition-base-i-and-ztso branch March 22, 2025 04:45
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A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. O-riscv Target: RISC-V architecture S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
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