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1 change: 1 addition & 0 deletions riscv/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Add `Mcause::from(usize)` for use in unit tests
- Add `Mstatus::from(usize)` for use in unit tests
- Add `Mstatus.bits()`
- Add `Eq` and `PartialEq` for `pmpcfgx::{Range, Permission}`
- Export `riscv::register::macros` module macros for external use

### Fixed
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4 changes: 2 additions & 2 deletions riscv/src/register/pmpcfgx.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
//! Physical memory protection configuration

/// Permission enum contains all possible permission modes for pmp registers
#[derive(Clone, Copy, Debug)]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum Permission {
NONE = 0b000,
R = 0b001,
Expand All @@ -14,7 +14,7 @@ pub enum Permission {
}

/// Range enum contains all possible addressing modes for pmp registers
#[derive(Clone, Copy, Debug)]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum Range {
OFF = 0b00,
TOR = 0b01,
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