FROMLIST: Add Glymur dt-binding support #218
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…Glymur QMP PCIe PHY The fifth PCIe instance on Glymur has a Gen5 4-lane PHY. Document it as a separate compatible. Link: https://lore.kernel.org/all/[email protected]/ Signed-off-by: Prudhvi Yarlagadda <[email protected]> Signed-off-by: Wenbin Yao <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
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…Glymur QMP PCIe Gen4 2-lane PHY The 4th and 6th PCIe instances on Glymur have Gen4 2-lane PHY. Document it as a separate compatible. Link: https://lore.kernel.org/all/[email protected]/ Signed-off-by: Qiang Yu <[email protected]>
On the Qualcomm Glymur platform the PCIe host is compatible with the DWC controller present on the X1E80100 platform. So document the PCIe controllers found on Glymur and use the X1E80100 compatible string as a fallback in the schema. Link: https://lore.kernel.org/all/[email protected]/ Signed-off-by: Prudhvi Yarlagadda <[email protected]> Signed-off-by: Wenbin Yao <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
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dt-bindings: PCI: qcom: Document the Glymur PCIe Controller
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY