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Makefile
Makefile
 
 
README.md
README.md
 
 
adder_6_bit.v
adder_6_bit.v
 
 
adder_6_bit_tb.v
adder_6_bit_tb.v
 
 
alu_6_bit.v
alu_6_bit.v
 
 
alu_6_bit_tb.v
alu_6_bit_tb.v
 
 
control_unit.v
control_unit.v
 
 
control_unit_tb.v
control_unit_tb.v
 
 
cpu.v
cpu.v
 
 
cpu_tb.v
cpu_tb.v
 
 
dec_3_to_8.v
dec_3_to_8.v
 
 
dec_3_to_8_tb.v
dec_3_to_8_tb.v
 
 
dec_3_to_8_with_en.v
dec_3_to_8_with_en.v
 
 
flag_register.v
flag_register.v
 
 
flag_register_tb.v
flag_register_tb.v
 
 
full_adder.v
full_adder.v
 
 
full_adder_tb.v
full_adder_tb.v
 
 
mux_2_to_1_3_bit.v
mux_2_to_1_3_bit.v
 
 
mux_2_to_1_3_bit_tb.v
mux_2_to_1_3_bit_tb.v
 
 
mux_2_to_1_6_bit.v
mux_2_to_1_6_bit.v
 
 
mux_2_to_1_6_bit_tb.v
mux_2_to_1_6_bit_tb.v
 
 
mux_4_to_1_3_bit.v
mux_4_to_1_3_bit.v
 
 
mux_4_to_1_3_bit_tb.v
mux_4_to_1_3_bit_tb.v
 
 
mux_4_to_1_6_bit.v
mux_4_to_1_6_bit.v
 
 
mux_4_to_1_6_bit_tb.v
mux_4_to_1_6_bit_tb.v
 
 
mux_8_to_1.v
mux_8_to_1.v
 
 
mux_8_to_1_6_bit.v
mux_8_to_1_6_bit.v
 
 
mux_8_to_1_6_bit_tb.v
mux_8_to_1_6_bit_tb.v
 
 
mux_8_to_1_tb.v
mux_8_to_1_tb.v
 
 
or_6_bit.v
or_6_bit.v
 
 
or_6_bit_tb.v
or_6_bit_tb.v
 
 
pc_3_bit.v
pc_3_bit.v
 
 
pc_3_bit_tb.v
pc_3_bit_tb.v
 
 
pca_3_bit.v
pca_3_bit.v
 
 
pca_3_bit_tb.v
pca_3_bit_tb.v
 
 
ram_1x1.v
ram_1x1.v
 
 
ram_1x17.v
ram_1x17.v
 
 
ram_1x17_tb.v
ram_1x17_tb.v
 
 
ram_1x1_tb.v
ram_1x1_tb.v
 
 
ram_7x17.v
ram_7x17.v
 
 
ram_7x17_tb.v
ram_7x17_tb.v
 
 
reg_1_bit.v
reg_1_bit.v
 
 
reg_1_bit_tb.v
reg_1_bit_tb.v
 
 
reg_6_bit.v
reg_6_bit.v
 
 
reg_6_bit_tb.v
reg_6_bit_tb.v
 
 
regset_6_bit_with_5.v
regset_6_bit_with_5.v
 
 
regset_6_bit_with_5_tb.v
regset_6_bit_with_5_tb.v
 
 
rol_6_bit.v
rol_6_bit.v
 
 
rol_6_bit_tb.v
rol_6_bit_tb.v
 
 

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How to get this verilog code up and running?

  1. Make sure you have GNU make installed onto your system.
  2. Open up terminal in this directory.
  3. Run make cpu

For running individual circuits check Makefile which will include all the commands per circuit. For running all the circuits altogether run make all.

Roll: 1803119

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