[Coverity][L0] Remove overlapping mem copy in urBindlessImagesSampledImageCreateExp

[wenju-he]

Tested in intel/llvm#12965

[wenju-he]

@kbenzie could you please review? thank you

[codecov-commenter]

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 12.51%. Comparing base (78ef1ca) to head (2b3d016).
Report is 120 commits behind head on main.

❗ Your organization needs to install the Codecov GitHub app to enable full functionality.

Additional details and impacted files

@@            Coverage Diff             @@
##             main    #1406      +/-   ##
==========================================
- Coverage   14.82%   12.51%   -2.32%     
==========================================
  Files         250      239      -11     
  Lines       36220    35949     -271     
  Branches     4094     4076      -18     
==========================================
- Hits         5369     4498     -871     
- Misses      30800    31447     +647     
+ Partials       51        4      -47     

☔ View full report in Codecov by Sentry.
📢 Have feedback on the report? Share it here.

[isaacault]

Is there a draft DPC++ PR for this as per the adapter change process?

[wenju-he]

Is there a draft DPC++ PR for this as per the adapter change process?

I'm afraid this is impossible since spirv part of device functions in https://github.com/intel/llvm/blob/sycl/sycl/include/sycl/ext/oneapi/bindless_images.hpp are not added yet. This means end-2-end test can't run on Intel DG2 GPU as the tests would fail in device code compilation stage.

[pbalcer]

Is there a draft DPC++ PR for this as per the adapter change process?

I'm afraid this is impossible since spirv part of device functions in https://github.com/intel/llvm/blob/sycl/sycl/include/sycl/ext/oneapi/bindless_images.hpp are not added yet. This means end-2-end test can't run on Intel DG2 GPU as the tests would fail in device code compilation stage.

We cannot merge changes into UR that would break upstream SYCL, since that would block updating UR in SYCL. Please indicate in the PR description that this requires other PRs to first be merged.

[wenju-he]

Is there a draft DPC++ PR for this as per the adapter change process?

I'm afraid this is impossible since spirv part of device functions in https://github.com/intel/llvm/blob/sycl/sycl/include/sycl/ext/oneapi/bindless_images.hpp are not added yet. This means end-2-end test can't run on Intel DG2 GPU as the tests would fail in device code compilation stage.

We cannot merge changes into UR that would break upstream SYCL, since that would block updating UR in SYCL. Please indicate in the PR description that this requires other PRs to first be merged.

This PR only fixes a coverity issue in UR.

Regarding intel/llvm repo this PR is a NFC change, because sycl bindless image tests in intel/llvm are not enabled on DG2 at all.

While we're waiting for dependent patch for sycl header that can enables end-2-end testing on DG2, we do have local version of the dependent patch for sycl headers, and the current support of bindless image in L0 adaptor enables us to debugging on DG2. The support is very helpful since it enables concurrent debugging from multiple people.

[isaacault]

I see this is just a coverity fix - LGTM.

I'm aware the bindless images SPIR-V isn't added yet, and thus the DPC++ CI wouldn't hit this, making it NFC regardless. I'll leave it to the UR merge team to decide if we still need to follow the process.