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zephyr: stm32n6 support #2348

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Merged
merged 3 commits into from
Jun 25, 2025
Merged

zephyr: stm32n6 support #2348

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83e524c
boot: zephyr: defines FLASH device for external NOR
FRASTM Sep 1, 2023
5467999
boot: zephyr: boards: Add configuration for stm32n6570_dk
erwango May 23, 2025
25b28ce
boot: stm32n6: Define specific executable region
erwango Jun 19, 2025
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4 changes: 4 additions & 0 deletions boot/zephyr/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -536,6 +536,10 @@ if((CONFIG_BOOT_SWAP_USING_SCRATCH OR CONFIG_BOOT_SWAP_USING_MOVE OR CONFIG_BOOT
zephyr_library_sources(flash_check.c)
endif()

if(CONFIG_BOOT_RAM_LOAD)
zephyr_library_sources(ram_load.c)
endif()

if(SYSBUILD)
if(CONFIG_SINGLE_APPLICATION_SLOT OR CONFIG_BOOT_FIRMWARE_LOADER OR CONFIG_BOOT_SWAP_USING_SCRATCH OR CONFIG_BOOT_SWAP_USING_MOVE OR CONFIG_BOOT_SWAP_USING_OFFSET OR CONFIG_BOOT_UPGRADE_ONLY OR CONFIG_BOOT_DIRECT_XIP OR CONFIG_BOOT_RAM_LOAD)
# TODO: RAM LOAD support
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3 changes: 3 additions & 0 deletions boot/zephyr/boards/stm32n6570_dk_stm32n657xx_fsbl.conf
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@@ -0,0 +1,3 @@
CONFIG_STM32_MEMMAP=y
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
CONFIG_BOOT_MAX_IMG_SECTORS=4096
19 changes: 18 additions & 1 deletion boot/zephyr/flash_map_extended.c
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Expand Up @@ -20,7 +20,24 @@

BOOT_LOG_MODULE_DECLARE(mcuboot);

#if (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller))
#if defined(CONFIG_STM32_MEMMAP)
/* MEMORY MAPPED for XiP on external NOR flash takes the sspi-nor or ospi-nor or qspi-nor device */
#define FLASH_DEVICE_ID SPI_FLASH_0_ID
#if DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_xspi_nor), okay)
#define DT_DRV_COMPAT st_stm32_xspi_nor
#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_xspi_nor)
#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_INST_PARENT(0), 1)
#elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_ospi_nor), okay)
#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_ospi_nor)
#define FLASH_DEVICE_BASE DT_REG_ADDR(DT_INST(0, st_stm32_ospi_nor))
#elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_qspi_nor), okay)
#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_qspi_nor)
#define FLASH_DEVICE_BASE DT_REG_ADDR(DT_INST(0, st_stm32_qspi_nor))
#else
#error "FLASH_DEVICE_NODE could not be determined"
#endif

#elif (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller))
#define FLASH_DEVICE_ID SOC_FLASH_0_ID
#define FLASH_DEVICE_BASE CONFIG_FLASH_BASE_ADDRESS
#define FLASH_DEVICE_NODE DT_CHOSEN(zephyr_flash_controller)
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4 changes: 4 additions & 0 deletions boot/zephyr/include/mcuboot_config/mcuboot_config.h
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Expand Up @@ -134,6 +134,10 @@
#define IMAGE_EXECUTABLE_RAM_SIZE CONFIG_BOOT_IMAGE_EXECUTABLE_RAM_SIZE
#endif

#ifdef CONFIG_SOC_SERIES_STM32N6X
#define MULTIPLE_EXECUTABLE_RAM_REGIONS
#endif
Comment on lines +137 to +139
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I do not think we should have SOC specific Kconfigs here. We rather should add some Kconfig to manipulate MULTIPLE_EXECUTABLE_RAM_REGIONS directly and then have it selected in soc/board prj.conf.

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@de-nordic So, where this new Kconfig should be defined, zephyr ?


#ifdef CONFIG_LOG
#define MCUBOOT_HAVE_LOGGING 1
#endif
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35 changes: 35 additions & 0 deletions boot/zephyr/ram_load.c
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@@ -0,0 +1,35 @@
/*
* Copyright (c) 2025 STMicroelectonics
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#include "../bootutil/include/bootutil/bootutil.h"
#include "../bootutil/include/bootutil/ramload.h"

#include <zephyr/devicetree.h>

#ifdef MULTIPLE_EXECUTABLE_RAM_REGIONS
int boot_get_image_exec_ram_info(uint32_t image_id,
uint32_t *exec_ram_start,
uint32_t *exec_ram_size)
{

#ifdef CONFIG_SOC_SERIES_STM32N6X
*exec_ram_start = DT_PROP_BY_IDX(DT_NODELABEL(axisram1), reg, 0);
*exec_ram_size = DT_PROP_BY_IDX(DT_NODELABEL(axisram1), reg, 1);
#endif

return 0;
}
#endif /* MULTIPLE_EXECUTABLE_RAM_REGIONS */
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