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[X86][Inline] Skip inline asm in inlining target feature check #83820

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Merged
merged 1 commit into from
Mar 5, 2024
Merged

[X86][Inline] Skip inline asm in inlining target feature check #83820

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4 changes: 4 additions & 0 deletions llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6087,6 +6087,10 @@ bool X86TTIImpl::areInlineCompatible(const Function *Caller,

for (const Instruction &I : instructions(Callee)) {
if (const auto *CB = dyn_cast<CallBase>(&I)) {
// Having more target features is fine for inline ASM.
if (CB->isInlineAsm())
continue;

SmallVector<Type *, 8> Types;
for (Value *Arg : CB->args())
Types.push_back(Arg->getType());
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17 changes: 6 additions & 11 deletions llvm/test/Transforms/Inline/X86/call-abi-compatibility.ll
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Expand Up @@ -94,27 +94,22 @@ define internal void @caller_not_avx4() {

declare i64 @caller_unknown_simple(i64)

; FIXME: This call should get inlined, because the callee only contains
; This call should get inlined, because the callee only contains
; inline ASM, not real calls.
define <8 x i64> @caller_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2) #0 {
; CHECK-LABEL: define {{[^@]+}}@caller_inline_asm
; CHECK-SAME: (ptr [[P0:%.*]], i64 [[K:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR2:[0-9]+]] {
; CHECK-NEXT: [[CALL:%.*]] = call <8 x i64> @callee_inline_asm(ptr [[P0]], i64 [[K]], ptr [[P1]], ptr [[P2]])
; CHECK-NEXT: ret <8 x i64> [[CALL]]
; CHECK-NEXT: [[SRC_I:%.*]] = load <8 x i64>, ptr [[P0]], align 64
; CHECK-NEXT: [[A_I:%.*]] = load <8 x i64>, ptr [[P1]], align 64
; CHECK-NEXT: [[B_I:%.*]] = load <8 x i64>, ptr [[P2]], align 64
; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> asm "vpaddb\09$($3, $2, $0 {$1}", "=v,^Yk,v,v,0,~{dirflag},~{fpsr},~{flags}"(i64 [[K]], <8 x i64> [[A_I]], <8 x i64> [[B_I]], <8 x i64> [[SRC_I]])
; CHECK-NEXT: ret <8 x i64> [[TMP1]]
;
%call = call <8 x i64> @callee_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2)
ret <8 x i64> %call
}

define internal <8 x i64> @callee_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2) #1 {
; CHECK-LABEL: define {{[^@]+}}@callee_inline_asm
; CHECK-SAME: (ptr [[P0:%.*]], i64 [[K:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR3:[0-9]+]] {
; CHECK-NEXT: [[SRC:%.*]] = load <8 x i64>, ptr [[P0]], align 64
; CHECK-NEXT: [[A:%.*]] = load <8 x i64>, ptr [[P1]], align 64
; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[P2]], align 64
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i64> asm "vpaddb\09$($3, $2, $0 {$1}", "=v,^Yk,v,v,0,~{dirflag},~{fpsr},~{flags}"(i64 [[K]], <8 x i64> [[A]], <8 x i64> [[B]], <8 x i64> [[SRC]])
; CHECK-NEXT: ret <8 x i64> [[TMP1]]
;
%src = load <8 x i64>, ptr %p0, align 64
%a = load <8 x i64>, ptr %p1, align 64
%b = load <8 x i64>, ptr %p2, align 64
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