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[PowerPC] Expand FSINCOS of fp128 #76494
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; CHECK-NEXT: mflr r0 | ||
; CHECK-NEXT: stdu r1, -64(r1) | ||
; CHECK-NEXT: std r0, 80(r1) | ||
; CHECK-NEXT: .cfi_def_cfa_offset 64 |
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nit: remove these unnecessary cfi pseudo instructions.
@@ -1176,6 +1176,7 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, | |||
setTruncStoreAction(MVT::f128, MVT::f32, Expand); | |||
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// No implementation for these ops for PowerPC. | |||
setOperationAction(ISD::FSINCOS, MVT::f128, Expand); |
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Have you checked other math related ISD nodes? Are MVT::f128 correctly handled for them?
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Yes, according to https://en.cppreference.com/w/c/numeric/math and nodes defined in ISDOpcodes.h. (they were already tested in f128-arith/round/fma.ll)
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LGTM.
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LGTM
Fixes #76442