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Merged
merged 5 commits into from
Nov 5, 2025
Merged

[LV][NFC] Remove undef values in some test cases #164401

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12401e7
[LV][NFC] Remove undef values in simple cases
david-arm Oct 21, 2025
a43ff1d
Address review comment
david-arm Oct 31, 2025
34ecbed
Address review comment
david-arm Oct 31, 2025
585e925
Address review comments
david-arm Nov 4, 2025
e0f7ea9
Merge branch 'main' into lv_rm_undef_vals
david-arm Nov 5, 2025
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12 changes: 6 additions & 6 deletions llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
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Expand Up @@ -35,7 +35,7 @@ target triple = "x86_64-unknown-linux-gnu"
; This test was originally vectorized, but now SCEV is smart enough to prove
; that its trip count is 1, so it gets ignored by vectorizer.
; Function Attrs: uwtable
define void @test_01(i1 %arg) {
define void @test_01(ptr addrspace(1) %p, i1 %arg) {
br label %.outer

; <label>:1: ; preds = %2
Expand All @@ -57,8 +57,8 @@ define void @test_01(i1 %arg) {
%8 = phi i32 [ %.ph2, %.outer ], [ %7, %6 ]
%9 = add i32 %8, 2
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr addrspace(1) undef, i64 %10
%12 = ashr i32 undef, %4
%11 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %10
%12 = ashr i32 12, %4
store i32 %12, ptr addrspace(1) %11, align 4
%13 = add i32 %7, 1
%14 = icmp sgt i32 %13, 61
Expand All @@ -74,7 +74,7 @@ define void @test_01(i1 %arg) {
; CHECK: store <4 x i32>

; Function Attrs: uwtable
define void @test_02(i1 %arg) {
define void @test_02(ptr addrspace(1) %p, i1 %arg) {
br label %.outer

; <label>:1: ; preds = %2
Expand All @@ -96,8 +96,8 @@ define void @test_02(i1 %arg) {
%8 = phi i32 [ %.ph2, %.outer ], [ %7, %6 ]
%9 = add i32 %8, 2
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr addrspace(1) undef, i64 %10
%12 = ashr i32 undef, %4
%11 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %10
%12 = ashr i32 12, %4
store i32 %12, ptr addrspace(1) %11, align 4
%13 = add i32 %7, 1
%14 = icmp sgt i32 %13, 610
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll
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Expand Up @@ -11,9 +11,9 @@
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-w64-windows-gnu"

define void @cff_index_load_offsets(i1 %cond, i8 %x, ptr %p) #0 {
define void @cff_index_load_offsets(i1 %cond, i8 %x, ptr %p, ptr %pend) #0 {
; CHECK-LABEL: define void @cff_index_load_offsets(
; CHECK-SAME: i1 [[COND:%.*]], i8 [[X:%.*]], ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-SAME: i1 [[COND:%.*]], i8 [[X:%.*]], ptr [[P:%.*]], ptr [[PEND:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br i1 [[COND]], label %[[IF_THEN:.*]], label %[[EXIT:.*]]
; CHECK: [[IF_THEN]]:
Expand All @@ -26,14 +26,14 @@ define void @cff_index_load_offsets(i1 %cond, i8 %x, ptr %p) #0 {
; CHECK-NEXT: [[CONV73:%.*]] = zext i8 [[TMP0]] to i32
; CHECK-NEXT: [[SHL74:%.*]] = shl nuw nsw i32 [[CONV73]], 16
; CHECK-NEXT: [[OR75:%.*]] = or i32 [[SHL74]], [[SHL71]]
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr undef, align 1, !tbaa [[CHAR_TBAA1]]
; CHECK-NEXT: [[SHL78:%.*]] = shl nuw nsw i32 undef, 8
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[P]], align 1, !tbaa [[CHAR_TBAA1]]
; CHECK-NEXT: [[SHL78:%.*]] = shl nuw nsw i32 12, 8
; CHECK-NEXT: [[OR79:%.*]] = or i32 [[OR75]], [[SHL78]]
; CHECK-NEXT: [[CONV81:%.*]] = zext i8 [[TMP1]] to i32
; CHECK-NEXT: [[OR83:%.*]] = or i32 [[OR79]], [[CONV81]]
; CHECK-NEXT: store i32 [[OR83]], ptr undef, align 4, !tbaa [[LONG_TBAA4:![0-9]+]]
; CHECK-NEXT: store i32 [[OR83]], ptr [[P]], align 4, !tbaa [[LONG_TBAA4:![0-9]+]]
; CHECK-NEXT: [[ADD_PTR86]] = getelementptr inbounds i8, ptr [[P_359]], i64 4
; CHECK-NEXT: [[CMP66:%.*]] = icmp ult ptr [[ADD_PTR86]], undef
; CHECK-NEXT: [[CMP66:%.*]] = icmp ult ptr [[ADD_PTR86]], [[PEND]]
; CHECK-NEXT: br i1 [[CMP66]], label %[[FOR_BODY68]], label %[[SW_EPILOG:.*]]
; CHECK: [[SW_EPILOG]]:
; CHECK-NEXT: unreachable
Expand All @@ -54,14 +54,14 @@ for.body68: ; preds = %for.body68, %if.the
%conv73 = zext i8 %0 to i32
%shl74 = shl nuw nsw i32 %conv73, 16
%or75 = or i32 %shl74, %shl71
%1 = load i8, ptr undef, align 1, !tbaa !1
%shl78 = shl nuw nsw i32 undef, 8
%1 = load i8, ptr %p, align 1, !tbaa !1
%shl78 = shl nuw nsw i32 12, 8
%or79 = or i32 %or75, %shl78
%conv81 = zext i8 %1 to i32
%or83 = or i32 %or79, %conv81
store i32 %or83, ptr undef, align 4, !tbaa !4
store i32 %or83, ptr %p, align 4, !tbaa !4
%add.ptr86 = getelementptr inbounds i8, ptr %p.359, i64 4
%cmp66 = icmp ult ptr %add.ptr86, undef
%cmp66 = icmp ult ptr %add.ptr86, %pend
br i1 %cmp66, label %for.body68, label %sw.epilog

sw.epilog: ; preds = %for.body68
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-large-gap.ll
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Expand Up @@ -41,8 +41,8 @@ for.cond.cleanup: ; preds = %for.body

; Make sure interleave groups with a key being the special 'empty' value for
; the map do not cause a crash.
define void @test_gap_empty_key() {
; CHECK-LABEL: @test_gap_empty_key()
define void @test_gap_empty_key(ptr %p) {
; CHECK-LABEL: @test_gap_empty_key(ptr %p)
; CHECK-NEXT: entry:
; CHECK-NEXT: br label %for.body

Expand All @@ -57,7 +57,7 @@ entry:
for.body:
%iv = phi i64 [ 1, %entry ], [ %iv.next, %for.body ]
%iv.next = add nsw i64 %iv, 1
%arrayidx = getelementptr inbounds [3 x i32], ptr undef, i64 0, i64 %iv.next
%arrayidx = getelementptr inbounds [3 x i32], ptr %p, i64 0, i64 %iv.next
%G2 = getelementptr i32, ptr %arrayidx, i64 %iv.next
%G9 = getelementptr i32, ptr %G2, i32 -2147483647
store i32 0, ptr %G2
Expand All @@ -71,8 +71,8 @@ exit:

; Make sure interleave groups with a key being the special 'tombstone' value for
; the map do not cause a crash.
define void @test_tombstone_key() {
; CHECK-LABEL: @test_tombstone_key()
define void @test_tombstone_key(ptr %p) {
; CHECK-LABEL: @test_tombstone_key(ptr %p)
; CHECK-NEXT: entry:
; CHECK-NEXT: br label %for.body

Expand All @@ -87,7 +87,7 @@ entry:
for.body:
%iv = phi i64 [ 1, %entry ], [ %iv.next, %for.body ]
%iv.next = add nsw i64 %iv, 1
%arrayidx = getelementptr inbounds [3 x i32], ptr undef, i64 0, i64 %iv.next
%arrayidx = getelementptr inbounds [3 x i32], ptr %p, i64 0, i64 %iv.next
%G2 = getelementptr i32, ptr %arrayidx, i64 %iv.next
%G9 = getelementptr i32, ptr %G2, i32 -2147483648
store i32 0, ptr %G2
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/LoopVectorize/demanded-bits-of-pointer-instruction.ll
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Expand Up @@ -4,13 +4,13 @@
; Only make sure we do not crash.

; CHECK: @test
define void @test(ptr %ptr, ptr %ptr_end) {
define void @test(i8 %v, ptr %ptr, ptr %ptr_end) {
start:
br label %loop

loop:
%ptr2 = phi ptr [ %ptr3, %loop ], [ %ptr, %start ]
%x = sext i8 undef to i64
%x = sext i8 %v to i64
%ptr3 = getelementptr inbounds i8, ptr %ptr2, i64 1
%cmp = icmp ult ptr %ptr3, %ptr_end
br i1 %cmp, label %loop, label %end
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
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Expand Up @@ -384,15 +384,15 @@ for.inc26:
; conditional store to remain scalar. Since we can only type-shrink vector
; types, we shouldn't try to represent the expression in a smaller type.
;
define void @minimal_bit_widths(i1 %c) {
define void @minimal_bit_widths(ptr %p, i1 %c) {
; UNROLL-LABEL: @minimal_bit_widths(
; UNROLL-NEXT: entry:
; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]]
; UNROLL: vector.body:
; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]
; UNROLL-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1
; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr undef, i64 [[INDEX]]
; UNROLL-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr undef, i64 [[TMP1]]
; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[INDEX]]
; UNROLL-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP1]]
; UNROLL-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1
; UNROLL-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP3]], align 1
; UNROLL-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]
Expand All @@ -415,8 +415,8 @@ define void @minimal_bit_widths(i1 %c) {
; UNROLL-NOSIMPLIFY: vector.body:
; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]
; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1
; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr undef, i64 [[INDEX]]
; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr undef, i64 [[TMP1]]
; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[INDEX]]
; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP1]]
; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1
; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP3]], align 1
; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
Expand All @@ -442,16 +442,16 @@ define void @minimal_bit_widths(i1 %c) {
; VEC-NEXT: br label [[VECTOR_BODY:%.*]]
; VEC: vector.body:
; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]
; VEC-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr undef, i64 [[INDEX]]
; VEC-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[INDEX]]
; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP1]], align 1
; VEC-NEXT: br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]
; VEC: pred.store.if:
; VEC-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 0
; VEC-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr undef, i64 [[TMP8]]
; VEC-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP8]]
; VEC-NEXT: [[TMP4:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 0
; VEC-NEXT: store i8 [[TMP4]], ptr [[TMP3]], align 1
; VEC-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 1
; VEC-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr undef, i64 [[TMP5]]
; VEC-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP5]]
; VEC-NEXT: [[TMP7:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 1
; VEC-NEXT: store i8 [[TMP7]], ptr [[TMP6]], align 1
; VEC-NEXT: br label [[PRED_STORE_CONTINUE2]]
Expand All @@ -468,7 +468,7 @@ entry:
for.body:
%tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ]
%tmp1 = phi i64 [ %tmp7, %for.inc ], [ 1000, %entry ]
%tmp2 = getelementptr i8, ptr undef, i64 %tmp0
%tmp2 = getelementptr i8, ptr %p, i64 %tmp0
%tmp3 = load i8, ptr %tmp2, align 1
br i1 %c, label %if.then, label %for.inc

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/LoopVectorize/nsw-crash.ll
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Expand Up @@ -3,15 +3,15 @@
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

define void @test(i1 %arg) {
define void @test(ptr %p, i1 %arg) {
entry:
br i1 %arg, label %while.end, label %while.body.lr.ph

while.body.lr.ph:
br label %while.body

while.body:
%it.sroa.0.091 = phi ptr [ undef, %while.body.lr.ph ], [ %incdec.ptr.i, %while.body ]
%it.sroa.0.091 = phi ptr [ %p, %while.body.lr.ph ], [ %incdec.ptr.i, %while.body ]
%incdec.ptr.i = getelementptr inbounds i32, ptr %it.sroa.0.091, i64 1
%inc32 = add i32 undef, 1 ; <------------- Make sure we don't set NSW flags to the undef.
%cmp.i11 = icmp eq ptr %incdec.ptr.i, undef
Expand Down
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