Skip to content

[mlir][tosa] Add ext-int64 support #164389

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Oct 24, 2025
Merged

[mlir][tosa] Add ext-int64 support #164389

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
4f5d6e8
[mlir][tosa] Add ext-int64 support
lhutton1 Sep 19, 2025
38ef363
Address review comments
lhutton1 Oct 24, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
149 changes: 127 additions & 22 deletions mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -467,6 +467,13 @@ profileComplianceMap = {
extensionComplianceMap = {
{"tosa.argmax",
{{{Extension::int16}, {{{i16T, i32T}, SpecificationVersion::V_1_0}}},
{{Extension::int64},
{{{i8T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{i16T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{i32T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{fp16T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{fp32T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3}, {{{fp8e4m3T, i32T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2}, {{{fp8e5m2T, i32T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T, i32T}, SpecificationVersion::V_1_0}}}}},
Expand Down Expand Up @@ -601,30 +608,68 @@ extensionComplianceMap = {
{"tosa.tanh",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.add",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.arithmetic_right_shift",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.bitwise_and",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.bitwise_or",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.bitwise_xor",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.intdiv",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.logical_left_shift",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.logical_right_shift",
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.maximum",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.minimum",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.mul",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.pow",
{{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.sub",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.table",
{{{Extension::int16},
{{{i16T, i16T, i32T}, SpecificationVersion::V_1_0}}}}},
{"tosa.abs",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.bitwise_not",
{{{Extension::int64},
{{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.ceil",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.clz",
{{{Extension::int64},
{{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.cos",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.exp",
Expand All @@ -634,7 +679,9 @@ extensionComplianceMap = {
{"tosa.log",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.negate",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.reciprocal",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
Expand All @@ -643,65 +690,84 @@ extensionComplianceMap = {
{"tosa.sin",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.select",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.equal",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, boolT}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, boolT}, SpecificationVersion::V_1_0}}}}},
{"tosa.greater",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, boolT}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, boolT}, SpecificationVersion::V_1_0}}}}},
{"tosa.greater_equal",
{{{Extension::bf16},
{{{Extension::int64},
{{{i64T, i64T, boolT}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16},
{{{bf16T, bf16T, boolT}, SpecificationVersion::V_1_0}}}}},
{"tosa.reduce_max",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.reduce_min",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.reduce_product",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.reduce_sum",
{{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.concat",
{{{Extension::int16}, {{{i16T, i16T}, SpecificationVersion::V_1_0}}},
{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.pad",
{{{Extension::fp8e4m3},
{{{Extension::int64},
{{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16},
{{{bf16T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.reshape",
{{{Extension::fp8e4m3},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.reverse",
{{{Extension::fp8e4m3},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.slice",
{{{Extension::fp8e4m3},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.tile",
{{{Extension::fp8e4m3},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.transpose",
{{{Extension::fp8e4m3},
{{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
Expand All @@ -712,14 +778,48 @@ extensionComplianceMap = {
{{Extension::fp8e5m2},
{{{fp8e5m2T, i32T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16},
{{{bf16T, i32T, bf16T}, SpecificationVersion::V_1_0}}}}},
{{{bf16T, i32T, bf16T}, SpecificationVersion::V_1_0}}},
{{Extension::int64},
{{{i8T, i64T, i8T}, SpecificationVersion::V_1_1_DRAFT},
{{i16T, i64T, i16T}, SpecificationVersion::V_1_1_DRAFT},
{{i32T, i64T, i32T}, SpecificationVersion::V_1_1_DRAFT},
{{i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{fp16T, i64T, fp16T}, SpecificationVersion::V_1_1_DRAFT},
{{fp32T, i64T, fp32T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3, Extension::int64},
{{{fp8e4m3T, i64T, fp8e4m3T}, SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::fp8e5m2, Extension::int64},
{{{fp8e5m2T, i64T, fp8e5m2T}, SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::int64},
{{{bf16T, i64T, bf16T}, SpecificationVersion::V_1_1_DRAFT}},
allOf}}},
{"tosa.scatter",
{{{Extension::fp8e4m3},
{{{fp8e4m3T, i32T, fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
{{{fp8e5m2T, i32T, fp8e5m2T, fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16},
{{{bf16T, i32T, bf16T, bf16T}, SpecificationVersion::V_1_0}}}}},
{{{bf16T, i32T, bf16T, bf16T}, SpecificationVersion::V_1_0}}},
{{Extension::int64},
{{{i8T, i64T, i8T, i8T}, SpecificationVersion::V_1_1_DRAFT},
{{i16T, i64T, i16T, i16T}, SpecificationVersion::V_1_1_DRAFT},
{{i32T, i64T, i32T, i32T}, SpecificationVersion::V_1_1_DRAFT},
{{i64T, i64T, i64T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{fp16T, i64T, fp16T, fp16T}, SpecificationVersion::V_1_1_DRAFT},
{{fp32T, i64T, fp32T, fp32T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3, Extension::int64},
{{{fp8e4m3T, i64T, fp8e4m3T, fp8e4m3T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::fp8e5m2, Extension::int64},
{{{fp8e5m2T, i64T, fp8e5m2T, fp8e5m2T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::int64},
{{{bf16T, i64T, bf16T, bf16T}, SpecificationVersion::V_1_1_DRAFT}},
allOf}}},
{"tosa.resize",
{{{Extension::int16},
{{{i16T, i48T}, SpecificationVersion::V_1_0},
Expand All @@ -735,6 +835,9 @@ extensionComplianceMap = {
{{bf16T, i32T}, SpecificationVersion::V_1_0},
{{bf16T, fp32T}, SpecificationVersion::V_1_0},
{{fp32T, bf16T}, SpecificationVersion::V_1_0}}},
{{Extension::int64},
{{{i32T, i64T}, SpecificationVersion::V_1_1_DRAFT},
{{i64T, i32T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16, Extension::fp8e4m3},
{{{bf16T, fp8e4m3T}, SpecificationVersion::V_1_0},
{{fp8e4m3T, bf16T}, SpecificationVersion::V_1_0}},
Expand All @@ -761,12 +864,14 @@ extensionComplianceMap = {
{"tosa.const",
{{{Extension::int4}, {{{i4T}, SpecificationVersion::V_1_0}}},
{{Extension::int16}, {{{i48T}, SpecificationVersion::V_1_0}}},
{{Extension::int64}, {{{i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3}, {{{fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2}, {{{fp8e5m2T}, SpecificationVersion::V_1_0}}},
{{Extension::bf16}, {{{bf16T}, SpecificationVersion::V_1_0}}}}},
{"tosa.identity",
{{{Extension::int4}, {{{i4T, i4T}, SpecificationVersion::V_1_0}}},
{{Extension::int16}, {{{i48T, i48T}, SpecificationVersion::V_1_0}}},
{{Extension::int64}, {{{i64T, i64T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T}, SpecificationVersion::V_1_0}}},
{{Extension::fp8e5m2},
Expand Down
10 changes: 7 additions & 3 deletions mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -228,6 +228,7 @@ class Tosa_I32EnumAttr<string name, string description, string mnemonic,
// FP : Floating-Point Inference. Primarily FP16 and FP32 operations.
//
// Extension:
// INT64 : 64-bit integer operations.
// INT16 : 16-bit integer operations.
// INT4 : 4-bit integer weights.
// BF16 : BFloat16 operations.
Expand Down Expand Up @@ -271,21 +272,24 @@ def Tosa_EXT_DOUBLEROUND : I32EnumAttrCase<"doubleround", 9>;
def Tosa_EXT_INEXACTROUND : I32EnumAttrCase<"inexactround", 10>;
def Tosa_EXT_DYNAMIC : I32EnumAttrCase<"dynamic", 11>;
def Tosa_EXT_MXFP : I32EnumAttrCase<"mxfp", 12>;
def Tosa_EXT_INT64 : I32EnumAttrCase<"int64", 13>;


def Tosa_ExtensionAttr
: Tosa_I32EnumAttr<"Extension", "supported TOSA extensions", "ext", [
Tosa_EXT_NONE, Tosa_EXT_INT16, Tosa_EXT_INT4, Tosa_EXT_BF16,
Tosa_EXT_FP8E4M3, Tosa_EXT_FP8E5M2, Tosa_EXT_FFT, Tosa_EXT_VARIABLE,
Tosa_EXT_CONTROLFLOW, Tosa_EXT_DOUBLEROUND, Tosa_EXT_INEXACTROUND,
Tosa_EXT_DYNAMIC, Tosa_EXT_MXFP
Tosa_EXT_DYNAMIC, Tosa_EXT_MXFP, Tosa_EXT_INT64
]> {
let extraClassDeclaration = [{
static llvm::SmallVector<Extension, 11> getAllValues() {
static llvm::SmallVector<Extension, 13> getAllValues() {
return {
Extension::int16, Extension::int4, Extension::bf16,
Extension::fp8e4m3, Extension::fp8e5m2, Extension::fft,
Extension::variable, Extension::controlflow, Extension::doubleround,
Extension::inexactround, Extension::dynamic, Extension::mxfp
Extension::inexactround, Extension::dynamic, Extension::mxfp,
Extension::int64
};
}
}];
Expand Down
Loading