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[X86][APX] Distinguish REX2 PUSH/POP from PPX #163526

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Merged
merged 1 commit into from
Oct 17, 2025
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[X86][APX] Distinguish REX2 PUSH/POP from PPX #163526

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1 change: 1 addition & 0 deletions llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
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Original file line number Diff line number Diff line change
Expand Up @@ -121,6 +121,7 @@ enum attributeBits {
"The Dynamic Duo! Prefer over all else because this changes " \
"most operands' meaning") \
ENUM_ENTRY(IC_64BIT_REX2, 2, "requires a REX2 prefix") \
ENUM_ENTRY(IC_64BIT_REX2_REXW, 3, "requires a REX2 and the W prefix") \
ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \
ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
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8 changes: 8 additions & 0 deletions llvm/test/MC/Disassembler/X86/apx/pushp-popp.txt
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Expand Up @@ -17,6 +17,10 @@
# INTEL: pushp r16
0xd5,0x18,0x50

# ATT: pushq %r16
# INTEL: push r16
0xd5,0x10,0x50

# ATT: popp %rax
# INTEL: popp rax
0xd5,0x08,0x58
Expand All @@ -32,3 +36,7 @@
# ATT: popp %r16
# INTEL: popp r16
0xd5,0x18,0x58

# ATT: popq %r16
# INTEL: pop r16
0xd5,0x10,0x58
8 changes: 7 additions & 1 deletion llvm/test/MC/X86/apx/pushp-popp-att.s
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@@ -1,7 +1,7 @@
# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR

# ERROR-COUNT-8: error:
# ERROR-COUNT-10: error:
# ERROR-NOT: error:

# CHECK: pushp %rax
Expand All @@ -16,6 +16,9 @@
# CHECK: pushp %r16
# CHECK: encoding: [0xd5,0x18,0x50]
pushp %r16
# CHECK: pushq %r16
# CHECK: encoding: [0xd5,0x10,0x50]
pushq %r16

# CHECK: popp %rax
# CHECK: encoding: [0xd5,0x08,0x58]
Expand All @@ -29,3 +32,6 @@
# CHECK: popp %r16
# CHECK: encoding: [0xd5,0x18,0x58]
popp %r16
# CHECK: popq %r16
# CHECK: encoding: [0xd5,0x10,0x58]
popq %r16
11 changes: 8 additions & 3 deletions llvm/utils/TableGen/X86DisassemblerTables.cpp
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Expand Up @@ -99,6 +99,7 @@ static inline bool inheritsFrom(InstructionContext child,
(noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
case IC_64BIT:
return (inheritsFrom(child, IC_64BIT_REXW) ||
inheritsFrom(child, IC_64BIT_REX2) ||
(noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
(!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
(noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
Expand Down Expand Up @@ -151,8 +152,10 @@ static inline bool inheritsFrom(InstructionContext child,
case IC_64BIT_REXW_XS:
case IC_64BIT_REXW_OPSIZE:
case IC_64BIT_REXW_ADSIZE:
case IC_64BIT_REX2:
case IC_64BIT_REX2_REXW:
return false;
case IC_64BIT_REX2:
return inheritsFrom(child, IC_64BIT_REX2_REXW);
case IC_VEX:
return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W)) ||
(WIG && inheritsFrom(child, IC_VEX_W)) ||
Expand Down Expand Up @@ -980,9 +983,11 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU))
o << "_U";
}
} else if ((index & ATTR_64BIT) && (index & ATTR_REX2))
} else if ((index & ATTR_64BIT) && (index & ATTR_REX2)) {
o << "IC_64BIT_REX2";
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
if (index & ATTR_REXW)
o << "_REXW";
} else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
o << "IC_64BIT_REXW_XS";
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
o << "IC_64BIT_REXW_XD";
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2 changes: 2 additions & 0 deletions llvm/utils/TableGen/X86RecognizableInstr.cpp
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Expand Up @@ -365,6 +365,8 @@ InstructionContext RecognizableInstr::insnContext() const {
insnContext = IC_64BIT_XD;
else if (OpPrefix == X86Local::XS)
insnContext = IC_64BIT_XS;
else if (HasREX_W && ExplicitREX2Prefix)
insnContext = IC_64BIT_REX2_REXW;
else if (ExplicitREX2Prefix)
insnContext = IC_64BIT_REX2;
else if (HasREX_W)
Expand Down