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@AZero13 AZero13 commented Oct 14, 2025

We can do usubo and we should do if we are able to use the CSPR, meaning 32 bits and below.

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llvmbot commented Oct 14, 2025

@llvm/pr-subscribers-backend-arm

@llvm/pr-subscribers-backend-aarch64

Author: AZero13 (AZero13)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/163457.diff

1 Files Affected:

  • (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.h (+3-3)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index 00956fdc8e48e..fa3b8aa559eed 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -328,9 +328,9 @@ class AArch64TargetLowering : public TargetLowering {
 
   bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
                             bool MathUsed) const override {
-    // Using overflow ops for overflow checks only should beneficial on
-    // AArch64.
-    return TargetLowering::shouldFormOverflowOp(Opcode, VT, true);
+    if (VT.isVector())
+      return false;
+    return !isOperationExpand(Opcode, VT);
   }
 
   Value *emitLoadLinked(IRBuilderBase &Builder, Type *ValueTy, Value *Addr,

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AZero13 commented Oct 14, 2025

@davemgreen please

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