[RISCV][NFC] Fix a misnamed variable

[pfusik]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: Piotr Fusik (pfusik)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/157686.diff

1 Files Affected:

• (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+2-2)

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 46f544c0d4df5..be7df92344d28 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -16257,8 +16257,8 @@ static SDValue performXORCombine(SDNode *N, SelectionDAG &DAG,
     SDValue Op0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N0.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
     SDValue Shl = DAG.getNode(ISD::SHL, DL, MVT::i64, Op0, Op1);
-    SDValue And = DAG.getNOT(DL, Shl, MVT::i64);
-    return DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, And);
+    SDValue Not = DAG.getNOT(DL, Shl, MVT::i64);
+    return DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Not);
   }
 
   // fold (xor (sllw 1, x), -1) -> (rolw ~1, x)

[lenary]

LGTM thanks

[topperc]

LGTM

[pfusik]

Rebased to fix unrelated CI failures:

2025-09-09T15:42:01.0992540Z Failed Tests (2):
2025-09-09T15:42:01.0992728Z   LLVM :: CodeGen/AMDGPU/fcopysign.gfx11plus.ll
2025-09-09T15:42:01.0993002Z   LLVM :: CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll