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[NFC][MC][XCore] Rearrange decoder functions for XCore disassembler #155009

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Merged
merged 1 commit into from
Aug 26, 2025
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[NFC][MC][XCore] Rearrange decoder functions for XCore disassembler #155009

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73 changes: 2 additions & 71 deletions llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -74,66 +74,13 @@ static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo) {
return *(RegInfo->getRegClass(RC).begin() + RegNo);
}

static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus Decode2RImmInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeR2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeRUSInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus
DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeL2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeLR2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus Decode3RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus Decode3RImmInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus Decode2RUSInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);
Expand All @@ -158,24 +105,6 @@ static DecodeStatus DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeL6RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeL5RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus
DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
const MCDisassembler *Decoder);

#include "XCoreGenDisassemblerTables.inc"

static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
Expand Down Expand Up @@ -713,6 +642,8 @@ DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}

#include "XCoreGenDisassemblerTables.inc"

MCDisassembler::DecodeStatus
XCoreDisassembler::getInstruction(MCInst &instr, uint64_t &Size,
ArrayRef<uint8_t> Bytes, uint64_t Address,
Expand Down