[X86][AVX512BITALG] add C/C++ and 32/64-bit builtins test coverage #152693
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@llvm/pr-subscribers-backend-x86 @llvm/pr-subscribers-clang Author: Simon Pilgrim (RKSimon) ChangesFull diff: https://github.com/llvm/llvm-project/pull/152693.diff 2 Files Affected:
diff --git a/clang/test/CodeGen/X86/avx512bitalg-builtins.c b/clang/test/CodeGen/X86/avx512bitalg-builtins.c
index c80fb5e708c55..0468fba7d534c 100644
--- a/clang/test/CodeGen/X86/avx512bitalg-builtins.c
+++ b/clang/test/CodeGen/X86/avx512bitalg-builtins.c
@@ -1,54 +1,57 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bitalg -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bitalg -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bitalg -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bitalg -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bitalg -emit-llvm -o - -Wall -Werror | FileCheck %s
#include <immintrin.h>
__m512i test_mm512_popcnt_epi16(__m512i __A) {
- // CHECK-LABEL: @test_mm512_popcnt_epi16
+ // CHECK-LABEL: test_mm512_popcnt_epi16
// CHECK: @llvm.ctpop.v32i16
return _mm512_popcnt_epi16(__A);
}
__m512i test_mm512_mask_popcnt_epi16(__m512i __A, __mmask32 __U, __m512i __B) {
- // CHECK-LABEL: @test_mm512_mask_popcnt_epi16
+ // CHECK-LABEL: test_mm512_mask_popcnt_epi16
// CHECK: @llvm.ctpop.v32i16
// CHECK: select <32 x i1> %{{[0-9]+}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
return _mm512_mask_popcnt_epi16(__A, __U, __B);
}
__m512i test_mm512_maskz_popcnt_epi16(__mmask32 __U, __m512i __B) {
- // CHECK-LABEL: @test_mm512_maskz_popcnt_epi16
+ // CHECK-LABEL: test_mm512_maskz_popcnt_epi16
// CHECK: @llvm.ctpop.v32i16
// CHECK: select <32 x i1> %{{[0-9]+}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
return _mm512_maskz_popcnt_epi16(__U, __B);
}
__m512i test_mm512_popcnt_epi8(__m512i __A) {
- // CHECK-LABEL: @test_mm512_popcnt_epi8
+ // CHECK-LABEL: test_mm512_popcnt_epi8
// CHECK: @llvm.ctpop.v64i8
return _mm512_popcnt_epi8(__A);
}
__m512i test_mm512_mask_popcnt_epi8(__m512i __A, __mmask64 __U, __m512i __B) {
- // CHECK-LABEL: @test_mm512_mask_popcnt_epi8
+ // CHECK-LABEL: test_mm512_mask_popcnt_epi8
// CHECK: @llvm.ctpop.v64i8
// CHECK: select <64 x i1> %{{[0-9]+}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
return _mm512_mask_popcnt_epi8(__A, __U, __B);
}
__m512i test_mm512_maskz_popcnt_epi8(__mmask64 __U, __m512i __B) {
- // CHECK-LABEL: @test_mm512_maskz_popcnt_epi8
+ // CHECK-LABEL: test_mm512_maskz_popcnt_epi8
// CHECK: @llvm.ctpop.v64i8
// CHECK: select <64 x i1> %{{[0-9]+}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
return _mm512_maskz_popcnt_epi8(__U, __B);
}
__mmask64 test_mm512_mask_bitshuffle_epi64_mask(__mmask64 __U, __m512i __A, __m512i __B) {
- // CHECK-LABEL: @test_mm512_mask_bitshuffle_epi64_mask
+ // CHECK-LABEL: test_mm512_mask_bitshuffle_epi64_mask
// CHECK: @llvm.x86.avx512.vpshufbitqmb.512
// CHECK: and <64 x i1> %{{.*}}, %{{.*}}
return _mm512_mask_bitshuffle_epi64_mask(__U, __A, __B);
}
__mmask64 test_mm512_bitshuffle_epi64_mask(__m512i __A, __m512i __B) {
- // CHECK-LABEL: @test_mm512_bitshuffle_epi64_mask
+ // CHECK-LABEL: test_mm512_bitshuffle_epi64_mask
// CHECK: @llvm.x86.avx512.vpshufbitqmb.512
return _mm512_bitshuffle_epi64_mask(__A, __B);
}
diff --git a/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c b/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c
index 4e65da02c137f..767123dbd6e24 100644
--- a/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c
@@ -1,105 +1,108 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bitalg -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bitalg -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bitalg -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bitalg -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bitalg -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s
#include <immintrin.h>
__m256i test_mm256_popcnt_epi16(__m256i __A) {
- // CHECK-LABEL: @test_mm256_popcnt_epi16
+ // CHECK-LABEL: test_mm256_popcnt_epi16
// CHECK: @llvm.ctpop.v16i16
return _mm256_popcnt_epi16(__A);
}
__m256i test_mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B) {
- // CHECK-LABEL: @test_mm256_mask_popcnt_epi16
+ // CHECK-LABEL: test_mm256_mask_popcnt_epi16
// CHECK: @llvm.ctpop.v16i16
// CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
return _mm256_mask_popcnt_epi16(__A, __U, __B);
}
__m256i test_mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) {
- // CHECK-LABEL: @test_mm256_maskz_popcnt_epi16
+ // CHECK-LABEL: test_mm256_maskz_popcnt_epi16
// CHECK: @llvm.ctpop.v16i16
// CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
return _mm256_maskz_popcnt_epi16(__U, __B);
}
__m128i test_mm_popcnt_epi16(__m128i __A) {
- // CHECK-LABEL: @test_mm_popcnt_epi16
+ // CHECK-LABEL: test_mm_popcnt_epi16
// CHECK: @llvm.ctpop.v8i16
return _mm_popcnt_epi16(__A);
}
__m128i test_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) {
- // CHECK-LABEL: @test_mm_mask_popcnt_epi16
+ // CHECK-LABEL: test_mm_mask_popcnt_epi16
// CHECK: @llvm.ctpop.v8i16
// CHECK: select <8 x i1> %{{[0-9]+}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
return _mm_mask_popcnt_epi16(__A, __U, __B);
}
__m128i test_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) {
- // CHECK-LABEL: @test_mm_maskz_popcnt_epi16
+ // CHECK-LABEL: test_mm_maskz_popcnt_epi16
// CHECK: @llvm.ctpop.v8i16
// CHECK: select <8 x i1> %{{[0-9]+}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
return _mm_maskz_popcnt_epi16(__U, __B);
}
__m256i test_mm256_popcnt_epi8(__m256i __A) {
- // CHECK-LABEL: @test_mm256_popcnt_epi8
+ // CHECK-LABEL: test_mm256_popcnt_epi8
// CHECK: @llvm.ctpop.v32i8
return _mm256_popcnt_epi8(__A);
}
__m256i test_mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B) {
- // CHECK-LABEL: @test_mm256_mask_popcnt_epi8
+ // CHECK-LABEL: test_mm256_mask_popcnt_epi8
// CHECK: @llvm.ctpop.v32i8
// CHECK: select <32 x i1> %{{[0-9]+}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
return _mm256_mask_popcnt_epi8(__A, __U, __B);
}
__m256i test_mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) {
- // CHECK-LABEL: @test_mm256_maskz_popcnt_epi8
+ // CHECK-LABEL: test_mm256_maskz_popcnt_epi8
// CHECK: @llvm.ctpop.v32i8
// CHECK: select <32 x i1> %{{[0-9]+}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
return _mm256_maskz_popcnt_epi8(__U, __B);
}
__m128i test_mm_popcnt_epi8(__m128i __A) {
- // CHECK-LABEL: @test_mm_popcnt_epi8
+ // CHECK-LABEL: test_mm_popcnt_epi8
// CHECK: @llvm.ctpop.v16i8
return _mm_popcnt_epi8(__A);
}
__m128i test_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) {
- // CHECK-LABEL: @test_mm_mask_popcnt_epi8
+ // CHECK-LABEL: test_mm_mask_popcnt_epi8
// CHECK: @llvm.ctpop.v16i8
// CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
return _mm_mask_popcnt_epi8(__A, __U, __B);
}
__m128i test_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) {
- // CHECK-LABEL: @test_mm_maskz_popcnt_epi8
+ // CHECK-LABEL: test_mm_maskz_popcnt_epi8
// CHECK: @llvm.ctpop.v16i8
// CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
return _mm_maskz_popcnt_epi8(__U, __B);
}
__mmask32 test_mm256_mask_bitshuffle_epi64_mask(__mmask32 __U, __m256i __A, __m256i __B) {
- // CHECK-LABEL: @test_mm256_mask_bitshuffle_epi64_mask
+ // CHECK-LABEL: test_mm256_mask_bitshuffle_epi64_mask
// CHECK: @llvm.x86.avx512.vpshufbitqmb.256
// CHECK: and <32 x i1> %{{.*}}, %{{.*}}
return _mm256_mask_bitshuffle_epi64_mask(__U, __A, __B);
}
__mmask32 test_mm256_bitshuffle_epi64_mask(__m256i __A, __m256i __B) {
- // CHECK-LABEL: @test_mm256_bitshuffle_epi64_mask
+ // CHECK-LABEL: test_mm256_bitshuffle_epi64_mask
// CHECK: @llvm.x86.avx512.vpshufbitqmb.256
return _mm256_bitshuffle_epi64_mask(__A, __B);
}
__mmask16 test_mm_mask_bitshuffle_epi64_mask(__mmask16 __U, __m128i __A, __m128i __B) {
- // CHECK-LABEL: @test_mm_mask_bitshuffle_epi64_mask
+ // CHECK-LABEL: test_mm_mask_bitshuffle_epi64_mask
// CHECK: @llvm.x86.avx512.vpshufbitqmb.128
// CHECK: and <16 x i1> %{{.*}}, %{{.*}}
return _mm_mask_bitshuffle_epi64_mask(__U, __A, __B);
}
__mmask16 test_mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B) {
- // CHECK-LABEL: @test_mm_bitshuffle_epi64_mask
+ // CHECK-LABEL: test_mm_bitshuffle_epi64_mask
// CHECK: @llvm.x86.avx512.vpshufbitqmb.128
return _mm_bitshuffle_epi64_mask(__A, __B);
}
|
RKSimon
changed the title
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/65/builds/20954 Here is the relevant piece of the build log for the reference |
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