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2 changes: 1 addition & 1 deletion llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3042,7 +3042,7 @@ Instruction *InstCombinerImpl::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
Value *V = LHS;
unsigned MaskElems = Mask.size();
auto *SrcTy = cast<FixedVectorType>(V->getType());
unsigned VecBitWidth = SrcTy->getPrimitiveSizeInBits().getFixedValue();
unsigned VecBitWidth = DL.getTypeSizeInBits(SrcTy);
unsigned SrcElemBitWidth = DL.getTypeSizeInBits(SrcTy->getElementType());
assert(SrcElemBitWidth && "vector elements must have a bitwidth");
unsigned SrcNumElems = SrcTy->getNumElements();
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=instcombine -S | FileCheck %s

; Make sure that we don't crash when optimizing shufflevector of <N x ptr> with <1 x i32> mask followed by bitcast of <1 x ptr> to ptr

define ptr @test(<3 x ptr> %vptr) {
; CHECK-LABEL: define ptr @test(
; CHECK-SAME: <3 x ptr> [[VPTR:%.*]]) {
; CHECK-NEXT: [[SV_EXTRACT:%.*]] = extractelement <3 x ptr> [[VPTR]], i64 0
; CHECK-NEXT: ret ptr [[SV_EXTRACT]]
;
%SV = shufflevector <3 x ptr> %vptr, <3 x ptr> zeroinitializer, <1 x i32> zeroinitializer
%BC = bitcast <1 x ptr> %SV to ptr
ret ptr %BC
}