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AMDGPU: Fix -amdgpu-mfma-vgpr-form flag on gfx908 #150599

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Merged
merged 1 commit into from
Jul 25, 2025
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AMDGPU: Fix -amdgpu-mfma-vgpr-form flag on gfx908 #150599

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14 changes: 9 additions & 5 deletions llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -81,11 +81,15 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
PSInputAddr = AMDGPU::getInitialPSInputAddr(F);
}

MayNeedAGPRs = ST.hasMAIInsts() && !MFMAVGPRForm;
if (!MFMAVGPRForm && ST.hasGFX90AInsts() &&
ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() &&
!mayUseAGPRs(F))
MayNeedAGPRs = false; // We will select all MAI with VGPR operands.
MayNeedAGPRs = ST.hasMAIInsts();
if (ST.hasGFX90AInsts()) {
// FIXME: MayNeedAGPRs is a misnomer for how this is used. MFMA selection
// should be separated from availability of AGPRs
if (MFMAVGPRForm ||
(ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() &&
!mayUseAGPRs(F)))
MayNeedAGPRs = false; // We will select all MAI with VGPR operands.
}

if (AMDGPU::isChainCC(CC)) {
// Chain functions don't receive an SP from their caller, but are free to
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3 changes: 3 additions & 0 deletions llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
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Original file line number Diff line number Diff line change
@@ -1,4 +1,7 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9,GFX908 %s

; Make sure flag is ignored
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -amdgpu-mfma-vgpr-form=1 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9,GFX908 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9,GFX90A %s

; GFX9-DAG: buffer_load_format_xyzw v[{{[0-9:]+}}], v{{[0-9]+}}, s[{{[0-9:]+}}], 0 idxen ; encoding:
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