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5 changes: 4 additions & 1 deletion llvm/lib/Target/AArch64/AArch64SystemOperands.td
Original file line number Diff line number Diff line change
Expand Up @@ -2387,6 +2387,9 @@ def : RWSysReg<"TRBSR_EL3", 0b11, 0b110, 0b1001, 0b1011, 0b011>;
// v9.6 FEAT_PoPS
//
let Requires = [{ {AArch64::FeaturePoPS} }] in {
def : DC<"CIGDVAPS", 0b000, 0b0111, 0b1111, 0b101>;
def : DC<"CIVAPS", 0b000, 0b0111, 0b1111, 0b001>;
}

let Requires = [{ {AArch64::FeaturePoPS, AArch64::FeatureMTE} }] in {
def : DC<"CIGDVAPS", 0b000, 0b0111, 0b1111, 0b101>;
}
4 changes: 2 additions & 2 deletions llvm/test/MC/AArch64/armv9.6a-ras.s
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
// RUN: not llvm-mc -triple aarch64 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix NO-POPS
// RUN: llvm-mc -triple aarch64 -mattr=+pops -show-encoding < %s 2>&1 | FileCheck %s --check-prefix HAS-POPS
// RUN: llvm-mc -triple aarch64 -mattr=+pops,+mte -show-encoding < %s 2>&1 | FileCheck %s --check-prefix HAS-POPS

dc CIGDVAPS, x3
dc CIVAPS, x3
// NO-POPS: error: DC CIGDVAPS requires: pops
// NO-POPS: error: DC CIGDVAPS requires: mte, memtag, pops
// NO-POPS: error: DC CIVAPS requires: pops

# HAS-POPS: dc cigdvaps, x3 // encoding: [0xa3,0x7f,0x08,0xd5]
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2 changes: 1 addition & 1 deletion llvm/test/MC/Disassembler/AArch64/armv9.6a-ras.txt
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
# RUN: llvm-mc -triple aarch64 -mattr=+pops -disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple aarch64 -mattr=+pops,+mte -disassemble < %s | FileCheck %s

#------------------------------------------------------------------------------
# ARMV9.6-A RAS Extensions
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