[AArch64] improve zero-cycle regmov test #143680
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,45 @@ | ||
| ; RUN: llc < %s -march=arm64 | FileCheck %s -check-prefixes=NOTCPU --match-full-lines | ||
| ; RUN: llc < %s -mtriple=arm64-apple-macosx -mcpu=apple-m1 | FileCheck %s -check-prefixes=CPU --match-full-lines | ||
| ; RUN: llc < %s -mtriple=arm64-apple-macosx -mcpu=apple-m1 -mattr=-zcm | FileCheck %s -check-prefixes=NOTATTR --match-full-lines | ||
| ; RUN: llc < %s -mtriple=arm64-apple-macosx -mattr=+zcm | FileCheck %s -check-prefixes=ATTR --match-full-lines | ||
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| define void @t(i32 %a, i32 %b, i32 %c, i32 %d) { | ||
| entry: | ||
| ; CHECK-LABEL: t: | ||
| ; NOTCPU: mov w0, w2 | ||
| ; NOTCPU: mov w1, w3 | ||
| ; NOTCPU: mov [[REG2:w[0-9]+]], w3 | ||
| ; NOTCPU: mov [[REG1:w[0-9]+]], w2 | ||
| ; NOTCPU-NEXT: bl {{_?foo}} | ||
| ; NOTCPU: mov w0, [[REG1]] | ||
| ; NOTCPU: mov w1, [[REG2]] | ||
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| ; CPU: mov [[REG2:x[0-9]+]], x3 | ||
| ; CPU: mov [[REG1:x[0-9]+]], x2 | ||
| ; CPU: mov x0, x2 | ||
| ; CPU: mov x1, x3 | ||
| ; CPU-NEXT: bl {{_?foo}} | ||
| ; CPU: mov x0, [[REG1]] | ||
| ; CPU: mov x1, [[REG2]] | ||
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| ; NOTATTR: mov [[REG2:w[0-9]+]], w3 | ||
| ; NOTATTR: mov [[REG1:w[0-9]+]], w2 | ||
| ; NOTATTR: mov w0, w2 | ||
| ; NOTATTR: mov w1, w3 | ||
| ; NOTATTR-NEXT: bl {{_?foo}} | ||
| ; NOTATTR: mov w0, [[REG1]] | ||
| ; NOTATTR: mov w1, [[REG2]] | ||
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| ; ATTR: mov x0, x2 | ||
| ; ATTR: mov x1, x3 | ||
| ; ATTR: mov [[REG2:x[0-9]+]], x3 | ||
| ; ATTR: mov [[REG1:x[0-9]+]], x2 | ||
| ; ATTR-NEXT: bl {{_?foo}} | ||
| ; ATTR: mov x0, [[REG1]] | ||
| ; ATTR: mov x1, [[REG2]] | ||
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| %call = call i32 @foo(i32 %c, i32 %d) | ||
| %call1 = call i32 @foo(i32 %c, i32 %d) | ||
| unreachable | ||
| } | ||
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| declare i32 @foo(i32, i32) | ||
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How big is the full assembly for the function? Would it make sense to auto-generate the check lines via
llvm/utils/update_llc_test_checks.py?There was a problem hiding this comment.
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its only 20-30 lines of assembly, I think its small enough to keep it manual and more manageable
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This interleaving off checks for different configuration makes it very hard to see what's going on.
I would expect that CPU/ATTR check lines are the same? Same for NOTATTR/NOTCPU?
If that's the case, they should be merged. Then it would make sense to auto-generate and check the full assembly for the case with and without the feature enabled (either via CPU or attribute)
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So CPU/ATTR differ because
-mcpuchanges the order of instructions. Same for NOTATTR/NOTCPU. I can separate each configuration by duplicating; CHECK: bl {{_?foo}}, or autogen it.There was a problem hiding this comment.
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I will separate the outputs as described, as I dont think the cons of autogenerating the test worth it here (overfitting, robustness, readability, harder to debug)
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Ah I see, thanks. Separating the output makes things clearer.