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[SeparateConstOffsetFromGEP] propagate const offset through GEP chains #143470

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Merged
merged 5 commits into from
Aug 21, 2025
Merged

[SeparateConstOffsetFromGEP] propagate const offset through GEP chains #143470

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58e8791
pre-commit tests
AlexMaclean Jun 6, 2025
21f47f3
[SeparateConstOffsetFromGEP] propogate const offset through GEP chains
AlexMaclean Jun 6, 2025
b743cc7
fixup tests
AlexMaclean Jun 10, 2025
f5586bf
address comments
AlexMaclean Aug 15, 2025
eb5990b
Merge branch 'main' into dev/amaclean/upstream/const-gep-chain
AlexMaclean Aug 21, 2025
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48 changes: 37 additions & 11 deletions llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1039,19 +1039,31 @@ bool SeparateConstOffsetFromGEP::splitGEP(GetElementPtrInst *GEP) {
if (GEP->getType()->isVectorTy())
return false;

// If the base of this GEP is a ptradd of a constant, lets pass the constant
// along. This ensures that when we have a chain of GEPs the constant
// offset from each is accumulated.
Value *NewBase;
const APInt *BaseOffset;
const bool ExtractBase =
match(GEP->getPointerOperand(),
m_PtrAdd(m_Value(NewBase), m_APInt(BaseOffset)));

const int64_t BaseByteOffset = ExtractBase ? BaseOffset->getSExtValue() : 0;

// The backend can already nicely handle the case where all indices are
// constant.
if (GEP->hasAllConstantIndices())
if (GEP->hasAllConstantIndices() && !ExtractBase)
return false;

bool Changed = canonicalizeArrayIndicesToIndexSize(GEP);

bool NeedsExtraction;
int64_t AccumulativeByteOffset = accumulateByteOffset(GEP, NeedsExtraction);
int64_t AccumulativeByteOffset =
BaseByteOffset + accumulateByteOffset(GEP, NeedsExtraction);

TargetTransformInfo &TTI = GetTTI(*GEP->getFunction());

if (!NeedsExtraction) {
if (!NeedsExtraction && !ExtractBase) {
Changed |= reorderGEP(GEP, TTI);
return Changed;
}
Expand All @@ -1075,7 +1087,9 @@ bool SeparateConstOffsetFromGEP::splitGEP(GetElementPtrInst *GEP) {

// Track information for preserving GEP flags.
bool AllOffsetsNonNegative = AccumulativeByteOffset >= 0;
bool AllNUWPreserved = true;
bool AllNUWPreserved = GEP->hasNoUnsignedWrap();
bool NewGEPInBounds = GEP->isInBounds();
bool NewGEPNUSW = GEP->hasNoUnsignedSignedWrap();

// Remove the constant offset in each sequential index. The resultant GEP
// computes the variadic base.
Expand Down Expand Up @@ -1111,6 +1125,16 @@ bool SeparateConstOffsetFromGEP::splitGEP(GetElementPtrInst *GEP) {
}
}
}
if (ExtractBase) {
GEPOperator *Base = cast<GEPOperator>(GEP->getPointerOperand());
AllNUWPreserved &= Base->hasNoUnsignedWrap();
NewGEPInBounds &= Base->isInBounds();
NewGEPNUSW &= Base->hasNoUnsignedSignedWrap();
AllOffsetsNonNegative &= BaseByteOffset >= 0;

GEP->setOperand(0, NewBase);
RecursivelyDeleteTriviallyDeadInstructions(Base);
}

// Clear the inbounds attribute because the new index may be off-bound.
// e.g.,
Expand Down Expand Up @@ -1138,21 +1162,21 @@ bool SeparateConstOffsetFromGEP::splitGEP(GetElementPtrInst *GEP) {

// If the initial GEP was NUW and all operations that we reassociate were NUW
// additions, the resulting GEPs are also NUW.
if (GEP->hasNoUnsignedWrap() && AllNUWPreserved) {
if (AllNUWPreserved) {
NewGEPFlags |= GEPNoWrapFlags::noUnsignedWrap();
// If the initial GEP additionally had NUSW (or inbounds, which implies
// NUSW), we know that the indices in the initial GEP must all have their
// signbit not set. For indices that are the result of NUW adds, the
// add-operands therefore also don't have their signbit set. Therefore, all
// indices of the resulting GEPs are non-negative -> we can preserve
// the inbounds/nusw flag.
CanPreserveInBoundsNUSW |= GEP->hasNoUnsignedSignedWrap();
CanPreserveInBoundsNUSW |= NewGEPNUSW;
}

if (CanPreserveInBoundsNUSW) {
if (GEP->isInBounds())
if (NewGEPInBounds)
NewGEPFlags |= GEPNoWrapFlags::inBounds();
else if (GEP->hasNoUnsignedSignedWrap())
else if (NewGEPNUSW)
NewGEPFlags |= GEPNoWrapFlags::noUnsignedSignedWrap();
}

Expand Down Expand Up @@ -1220,11 +1244,13 @@ bool SeparateConstOffsetFromGEP::run(Function &F) {

DL = &F.getDataLayout();
bool Changed = false;
for (BasicBlock &B : F) {
if (!DT->isReachableFromEntry(&B))

ReversePostOrderTraversal<Function *> RPOT(&F);
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@nikic nikic Jun 10, 2025

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How is this related to the rest of the patch?

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@AlexMaclean AlexMaclean Jun 10, 2025

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The intent is to ensure that when there is a chain of GEPs, we always separate constant offsets in order. This way the logic to pick up the constant offset from the first GEP and pass it along through the second always works as expected. My understanding is that a standard iteration doesn't have very strong guarantees about the ordering of blocks and a RPOT would ensure GEPs are transformed in order.

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@nikic nikic Jul 20, 2025

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Is there test coverage for this?

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@Artem-B Artem-B Jul 22, 2025

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I'm not sure what a test for something like this look like. We can check the result (and the test cover that), but the traversal order is an implementation detail not directly visible in the outputs. We could arrange input basic blocks in the way that may give us incorrect results w/o RPOT, but that would also be a subject to no order guarantees.

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@AlexMaclean AlexMaclean Aug 15, 2025

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I've just added @test_rpot to demonstrate the possible benefit for this. Non-topologically sorted blocks are likely pretty rare but it seems like we may as well handle this case properly.

for (BasicBlock *B : RPOT) {
if (!DT->isReachableFromEntry(B))
continue;

for (Instruction &I : llvm::make_early_inc_range(B))
for (Instruction &I : llvm::make_early_inc_range(*B))
if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(&I))
Changed |= splitGEP(GEP);
// No need to split GEP ConstantExprs because all its indices are constant
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -279,11 +279,11 @@ define protected amdgpu_kernel void @kernel_round1(ptr addrspace(1) nocapture no
; CHECK-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; CHECK-NEXT: ds_write_b32 v0, v58
; CHECK-NEXT: s_branch .LBB0_7
; CHECK-NEXT: .LBB0_16: ; %Flow45
; CHECK-NEXT: .LBB0_16: ; %Flow43
; CHECK-NEXT: ; in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: s_or_b32 exec_lo, exec_lo, s69
; CHECK-NEXT: v_mov_b32_e32 v57, v0
; CHECK-NEXT: .LBB0_17: ; %Flow46
; CHECK-NEXT: .LBB0_17: ; %Flow44
; CHECK-NEXT: ; in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: s_or_b32 exec_lo, exec_lo, s68
; CHECK-NEXT: s_mov_b32 s55, exec_lo
Expand Down Expand Up @@ -330,11 +330,11 @@ define protected amdgpu_kernel void @kernel_round1(ptr addrspace(1) nocapture no
; CHECK-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; CHECK-NEXT: ds_write_b32 v0, v57
; CHECK-NEXT: s_branch .LBB0_19
; CHECK-NEXT: .LBB0_22: ; %Flow43
; CHECK-NEXT: .LBB0_22: ; %Flow41
; CHECK-NEXT: ; in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: s_inst_prefetch 0x2
; CHECK-NEXT: s_or_b32 exec_lo, exec_lo, s68
; CHECK-NEXT: .LBB0_23: ; %Flow44
; CHECK-NEXT: .LBB0_23: ; %Flow42
; CHECK-NEXT: ; in Loop: Header=BB0_5 Depth=1
; CHECK-NEXT: s_or_b32 exec_lo, exec_lo, s55
; CHECK-NEXT: ; %bb.24: ; in Loop: Header=BB0_5 Depth=1
Expand All @@ -347,7 +347,7 @@ define protected amdgpu_kernel void @kernel_round1(ptr addrspace(1) nocapture no
; CHECK-NEXT: s_or_b32 s53, s4, s53
; CHECK-NEXT: s_andn2_b32 exec_lo, exec_lo, s53
; CHECK-NEXT: s_cbranch_execnz .LBB0_5
; CHECK-NEXT: .LBB0_25: ; %Flow51
; CHECK-NEXT: .LBB0_25: ; %Flow49
; CHECK-NEXT: s_or_b32 exec_lo, exec_lo, s52
; CHECK-NEXT: v_mov_b32_e32 v31, v40
; CHECK-NEXT: v_mov_b32_e32 v0, 1
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep-inbounds.ll
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Expand Up @@ -279,8 +279,8 @@ define void @addrspace3(ptr addrspace(3) %in.ptr, i64 %in.idx1) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IN_IDX1_NNEG:%.*]] = and i64 [[IN_IDX1]], 9223372036854775807
; CHECK-NEXT: [[IDXPROM:%.*]] = trunc i64 [[IN_IDX1_NNEG]] to i32
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i128, ptr addrspace(3) [[IN_PTR]], i32 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP0]], i64 1024
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i128, ptr addrspace(3) [[IN_PTR]], i32 [[IDXPROM]]
; CHECK-NEXT: [[IDX11:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP0]], i32 1024
; CHECK-NEXT: ret void
;
entry:
Expand All @@ -296,8 +296,8 @@ define void @addrspace7(ptr addrspace(7) %in.ptr, i64 %in.idx1) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IN_IDX1_NNEG:%.*]] = and i64 [[IN_IDX1]], 9223372036854775807
; CHECK-NEXT: [[IDXPROM:%.*]] = trunc i64 [[IN_IDX1_NNEG]] to i32
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i128, ptr addrspace(7) [[IN_PTR]], i32 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(7) [[TMP0]], i64 1024
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i128, ptr addrspace(7) [[IN_PTR]], i32 [[IDXPROM]]
; CHECK-NEXT: [[IDX11:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP0]], i32 1024
; CHECK-NEXT: ret void
;
entry:
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep.ll
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Expand Up @@ -74,13 +74,13 @@ define void @reorder_i8half(ptr addrspace(3) %in.ptr, i64 %in.idx0, i64 %in.idx1
; CHECK-NEXT: [[IDX0:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM1]]
; CHECK-NEXT: [[IDXPROM2:%.*]] = trunc i64 [[IN_IDX1]] to i32
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM2]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP0]], i64 256
; CHECK-NEXT: [[IDX13:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP0]], i32 256
; CHECK-NEXT: [[IDXPROM3:%.*]] = trunc i64 [[IN_IDX1]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM3]]
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP2]], i64 512
; CHECK-NEXT: [[IDX25:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP2]], i32 512
; CHECK-NEXT: [[IDXPROM4:%.*]] = trunc i64 [[IN_IDX1]] to i32
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM4]]
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP4]], i64 768
; CHECK-NEXT: [[IDX37:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP4]], i32 768
; CHECK-NEXT: ret void
;
entry:
Expand Down Expand Up @@ -169,13 +169,13 @@ define void @bad_index(ptr addrspace(3) %in.ptr, i64 %in.idx0, i64 %in.idx1) {
; CHECK-NEXT: [[IDX0:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM1]]
; CHECK-NEXT: [[IDXPROM2:%.*]] = trunc i64 [[IN_IDX1]] to i32
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM2]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP4]], i64 1
; CHECK-NEXT: [[IDX13:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP4]], i32 1
; CHECK-NEXT: [[IDXPROM3:%.*]] = trunc i64 [[IN_IDX1]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM3]]
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP2]], i64 2
; CHECK-NEXT: [[IDX25:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP2]], i32 2
; CHECK-NEXT: [[IDXPROM4:%.*]] = trunc i64 [[IN_IDX1]] to i32
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr half, ptr addrspace(3) [[BASE]], i32 [[IDXPROM4]]
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP0]], i64 3
; CHECK-NEXT: [[IDX37:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP0]], i32 3
; CHECK-NEXT: ret void
;
entry:
Expand Down
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