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[DAGISel] Keep flags when converting FP load/store to integer #111679

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Merged
merged 3 commits into from
Oct 10, 2024
Merged

[DAGISel] Keep flags when converting FP load/store to integer #111679

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b64f783
Pre-commit test showing bug
ostannard Oct 9, 2024
6c122b8
[DAGISel] Keep flags when converting FP load/store to integer
ostannard Oct 9, 2024
6a4d201
Merge remote-tracking branch 'origin/main' into volatile
ostannard Oct 9, 2024
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10 changes: 4 additions & 6 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -20322,13 +20322,11 @@ SDValue DAGCombiner::TransformFPLoadStorePair(SDNode *N) {
!FastLD || !FastST)
return SDValue();

SDValue NewLD =
DAG.getLoad(IntVT, SDLoc(Value), LD->getChain(), LD->getBasePtr(),
LD->getPointerInfo(), LD->getAlign());
SDValue NewLD = DAG.getLoad(IntVT, SDLoc(Value), LD->getChain(),
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We ought to preserve the in-memory type, but we have very lax treatment of it today

LD->getBasePtr(), LD->getMemOperand());

SDValue NewST =
DAG.getStore(ST->getChain(), SDLoc(N), NewLD, ST->getBasePtr(),
ST->getPointerInfo(), ST->getAlign());
SDValue NewST = DAG.getStore(ST->getChain(), SDLoc(N), NewLD,
ST->getBasePtr(), ST->getMemOperand());

AddToWorklist(NewLD.getNode());
AddToWorklist(NewST.getNode());
Expand Down
24 changes: 24 additions & 0 deletions llvm/test/CodeGen/ARM/load-store-pair-volatile.ll
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Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=arm-none-eabi -stop-after=finalize-isel < %s | FileCheck %s

define void @test(ptr %vol_one, ptr %p_in, ptr %p_out, i32 %n) {
; CHECK-LABEL: name: test
; CHECK: bb.0.entry:
; CHECK-NEXT: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $r1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $r0
; CHECK-NEXT: [[LDRi12_:%[0-9]+]]:gpr = LDRi12 [[COPY1]], 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.p_in)
; CHECK-NEXT: STRi12 killed [[LDRi12_]], [[COPY2]], 0, 14 /* CC::al */, $noreg :: (volatile store (s32) into %ir.vol_one)
; CHECK-NEXT: [[LDRi12_1:%[0-9]+]]:gpr = LDRi12 [[COPY2]], 4, 14 /* CC::al */, $noreg :: (volatile load (s32) from %ir.vol_two)
; CHECK-NEXT: STRi12 killed [[LDRi12_1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32) into %ir.p_out)
; CHECK-NEXT: MOVPCLR 14 /* CC::al */, $noreg
entry:
%vol_two = getelementptr inbounds i8, ptr %vol_one, i32 4
%a = load float, ptr %p_in, align 4
store volatile float %a, ptr %vol_one, align 4
%b = load volatile float, ptr %vol_two, align 4
store float %b, ptr %p_out, align 4
ret void
}
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
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Expand Up @@ -1442,8 +1442,8 @@ define void @caller_fpr_stack() {
; 32BIT-NEXT: renamable $r4 = LWZtoc @f14, $r2 :: (load (s32) from got)
; 32BIT-NEXT: renamable $f0 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d15)
; 32BIT-NEXT: renamable $r5 = LWZtoc @f16, $r2 :: (load (s32) from got)
; 32BIT-NEXT: renamable $r3 = LWZ 0, killed renamable $r4 :: (load (s32) from @f14)
; 32BIT-NEXT: renamable $r4 = LWZ 0, killed renamable $r5 :: (load (s32) from @f16)
; 32BIT-NEXT: renamable $r3 = LWZ 0, killed renamable $r4 :: (dereferenceable load (s32) from @f14)
; 32BIT-NEXT: renamable $r4 = LWZ 0, killed renamable $r5 :: (dereferenceable load (s32) from @f16)
; 32BIT-NEXT: ADJCALLSTACKDOWN 144, 0, implicit-def dead $r1, implicit $r1
; 32BIT-NEXT: renamable $r5 = LI 0
; 32BIT-NEXT: renamable $r6 = LIS 16352
Expand Down Expand Up @@ -1532,9 +1532,9 @@ define void @caller_fpr_stack() {
; 64BIT-NEXT: renamable $x3 = LDtoc @f14, $x2 :: (load (s64) from got)
; 64BIT-NEXT: renamable $x4 = LDtoc @d15, $x2 :: (load (s64) from got)
; 64BIT-NEXT: renamable $x5 = LDtoc @f16, $x2 :: (load (s64) from got)
; 64BIT-NEXT: renamable $r3 = LWZ 0, killed renamable $x3 :: (load (s32) from @f14)
; 64BIT-NEXT: renamable $x4 = LD 0, killed renamable $x4 :: (load (s64) from @d15)
; 64BIT-NEXT: renamable $r5 = LWZ 0, killed renamable $x5 :: (load (s32) from @f16)
; 64BIT-NEXT: renamable $r3 = LWZ 0, killed renamable $x3 :: (dereferenceable load (s32) from @f14)
; 64BIT-NEXT: renamable $x4 = LD 0, killed renamable $x4 :: (dereferenceable load (s64) from @d15)
; 64BIT-NEXT: renamable $r5 = LWZ 0, killed renamable $x5 :: (dereferenceable load (s32) from @f16)
; 64BIT-NEXT: ADJCALLSTACKDOWN 176, 0, implicit-def dead $r1, implicit $r1
; 64BIT-NEXT: renamable $x6 = LDtocCPT %const.0, $x2 :: (load (s64) from got)
; 64BIT-NEXT: STW killed renamable $r5, 168, $x1 :: (store (s32))
Expand Down
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