suboptimal shufflevector codegen, shufflevector+trunc

[zhengyang92]

https://alive2.llvm.org/ce/z/X6DPQJ

https://godbolt.org/z/5GMPGxdKE

This pattern and its variants appear quite a lot in 638.imagick in SPEC CPU17.

[zhengyang92]

@regehr @RKSimon @dtcxzyw

[RKSimon]

I had considered whether we need some sort of ISD::TRUNCATE_VECTOR_INREG node but I think we might be able to make use of ISD::VECTOR_COMPRESS once #92289 lands