fix tests

Author: realqhc

clang/test/Driver/print-supported-extensions-riscv.c

@@ -180,6 +180,7 @@
 // CHECK-NEXT:     xwchc                2.2       'Xwchc' (WCH/QingKe additional compressed opcodes)
 // CHECK-EMPTY:
 // CHECK-NEXT: Experimental extensions
+// CHECK-NEXT:     p                    0.12      'P' ('Base P' (Packed SIMD))
 // CHECK-NEXT:     zicfilp              1.0       'Zicfilp' (Landing pad)
 // CHECK-NEXT:     zicfiss              1.0       'Zicfiss' (Shadow stack)
 // CHECK-NEXT:     zalasr               0.1       'Zalasr' (Load-Acquire and Store-Release Instructions)

llvm/test/CodeGen/RISCV/attributes.ll

@@ -615,7 +615,7 @@
 ; RV64SSCTR: .attribute 5, "rv64i2p1_sscsrind1p0_ssctr1p0"
 ; RV64SDEXT: .attribute 5, "rv64i2p1_sdext1p0"
 ; RV64SDTRIG: .attribute 5, "rv64i2p1_sdtrig1p0"
-; RV64P: .attribute 5, "rv64i2p1_p1p0"
+; RV64P: .attribute 5, "rv64i2p1_p0p12"
 
 ; RVI20U32: .attribute 5, "rv32i2p1"
 ; RVI20U64: .attribute 5, "rv64i2p1"

llvm/test/MC/RISCV/attribute-arch.s

@@ -474,8 +474,8 @@
 .attribute arch, "rv32i_sdtrig1p0"
 # CHECK: attribute      5, "rv32i2p1_sdtrig1p0"
 
-.attribute arch, "rv32i_p1p0"
+.attribute arch, "rv32i_p0p12"
 # CHECK: attribute      5, "rv32i2p1_p0p12"
 
-.attribute arch, "rv64i_p1p0"
+.attribute arch, "rv64i_p0p12"
 # CHECK: attribute      5, "rv64i2p1_p0p12"