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[mlir][spirv][doc] Remove duplicate syntax formats (#73386)
Some operations defined their syntax both in the documentation and via `assemblyFormat`. This leads to two syntax descriptions in the documentation for SPIR-V, see for example the documentation for [`spirv.mlir.yield`](https://mlir.llvm.org/docs/Dialects/SPIR-V/#spirvmliryield-spirvyieldop). Since the `assemblyFormat` is used to generate the actual parsers and printer implementations, this PR removes the manual syntax descriptions. (Similar to #73343.) The strategy that I used to find the duplicates was pretty uncomplicated. I scrolled through the [SPIR-V Dialect](https://mlir.llvm.org/docs/Dialects/SPIR-V) to find all duplicates and then remove the duplicate text from the `td` file. Note that the `Syntax:` block in the docs is a good proxy for whether `assemblyFormat` is defined because it will only be generated if the op has defined `assemblyFormat` (`op.hasAssemblyFormat()`): https://github.com/llvm/llvm-project/blob/e970652776bd07dbe42be557bf98722749230653/mlir/tools/mlir-tblgen/OpDocGen.cpp#L108-L124 https://github.com/llvm/llvm-project/blob/e970652776bd07dbe42be557bf98722749230653/mlir/tools/mlir-tblgen/OpDocGen.cpp#L197-L199 Related issue #73359.
1 parent 272085f commit 56cf3ff

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‎mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td

Lines changed: 30 additions & 147 deletions
Original file line numberDiff line numberDiff line change
@@ -88,18 +88,11 @@ def SPIRV_FAddOp : SPIRV_ArithmeticBinaryOp<"FAdd", SPIRV_Float, [Commutative]>
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let description = [{
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Result Type must be a scalar or vector of floating-point type.
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The types of Operand 1 and Operand 2 both must be the same as Result
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The types of Operand 1 and Operand 2 both must be the same as Result
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Type.
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Results are computed per component.
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Results are computed per component.
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<!-- End of AutoGen section -->
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```
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float-scalar-vector-type ::= float-type |
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`vector<` integer-literal `x` float-type `>`
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fadd-op ::= ssa-id `=` `spirv.FAdd` ssa-use, ssa-use
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`:` float-scalar-vector-type
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```
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#### Example:
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```mlir
@@ -117,20 +110,12 @@ def SPIRV_FDivOp : SPIRV_ArithmeticBinaryOp<"FDiv", SPIRV_Float, []> {
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let description = [{
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Result Type must be a scalar or vector of floating-point type.
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The types of Operand 1 and Operand 2 both must be the same as Result
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The types of Operand 1 and Operand 2 both must be the same as Result
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Type.
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Results are computed per component. The resulting value is undefined
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Results are computed per component. The resulting value is undefined
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if Operand 2 is 0.
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<!-- End of AutoGen section -->
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```
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float-scalar-vector-type ::= float-type |
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`vector<` integer-literal `x` float-type `>`
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fdiv-op ::= ssa-id `=` `spirv.FDiv` ssa-use, ssa-use
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`:` float-scalar-vector-type
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```
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#### Example:
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```mlir
@@ -150,21 +135,14 @@ def SPIRV_FModOp : SPIRV_ArithmeticBinaryOp<"FMod", SPIRV_Float, []> {
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let description = [{
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Result Type must be a scalar or vector of floating-point type.
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The types of Operand 1 and Operand 2 both must be the same as Result
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The types of Operand 1 and Operand 2 both must be the same as Result
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Type.
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Results are computed per component. The resulting value is undefined
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Results are computed per component. The resulting value is undefined
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if Operand 2 is 0. Otherwise, the result is the remainder r of Operand
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1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
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sign of Operand 2.
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<!-- End of AutoGen section -->
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```
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float-scalar-vector-type ::= float-type |
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`vector<` integer-literal `x` float-type `>`
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fmod-op ::= ssa-id `=` `spirv.FMod` ssa-use, ssa-use
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`:` float-scalar-vector-type
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```
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#### Example:
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```mlir
@@ -182,19 +160,10 @@ def SPIRV_FMulOp : SPIRV_ArithmeticBinaryOp<"FMul", SPIRV_Float, [Commutative]>
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let description = [{
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Result Type must be a scalar or vector of floating-point type.
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The types of Operand 1 and Operand 2 both must be the same as Result
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The types of Operand 1 and Operand 2 both must be the same as Result
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Type.
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Results are computed per component.
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<!-- End of AutoGen section -->
191-
192-
```
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float-scalar-vector-type ::= float-type |
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`vector<` integer-literal `x` float-type `>`
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fmul-op ::= `spirv.FMul` ssa-use, ssa-use
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`:` float-scalar-vector-type
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```
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Results are computed per component.
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#### Example:
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@@ -218,17 +187,9 @@ def SPIRV_FNegateOp : SPIRV_ArithmeticUnaryOp<"FNegate", SPIRV_Float, []> {
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let description = [{
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Result Type must be a scalar or vector of floating-point type.
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The type of Operand must be the same as Result Type.
222-
223-
Results are computed per component.
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<!-- End of AutoGen section -->
190+
The type of Operand must be the same as Result Type.
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227-
```
228-
float-scalar-vector-type ::= float-type |
229-
`vector<` integer-literal `x` float-type `>`
230-
fmul-op ::= `spirv.FNegate` ssa-use `:` float-scalar-vector-type
231-
```
192+
Results are computed per component.
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233194
#### Example:
234195

@@ -249,22 +210,14 @@ def SPIRV_FRemOp : SPIRV_ArithmeticBinaryOp<"FRem", SPIRV_Float, []> {
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let description = [{
250211
Result Type must be a scalar or vector of floating-point type.
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252-
The types of Operand 1 and Operand 2 both must be the same as Result
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The types of Operand 1 and Operand 2 both must be the same as Result
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Type.
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255-
Results are computed per component. The resulting value is undefined
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Results are computed per component. The resulting value is undefined
256217
if Operand 2 is 0. Otherwise, the result is the remainder r of Operand
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1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
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sign of Operand 1.
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260-
<!-- End of AutoGen section -->
261-
```
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float-scalar-vector-type ::= float-type |
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`vector<` integer-literal `x` float-type `>`
264-
frem-op ::= ssa-id `=` `spirv.FRemOp` ssa-use, ssa-use
265-
`:` float-scalar-vector-type
266-
```
267-
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#### Example:
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270223
```mlir
@@ -282,18 +235,10 @@ def SPIRV_FSubOp : SPIRV_ArithmeticBinaryOp<"FSub", SPIRV_Float, []> {
282235
let description = [{
283236
Result Type must be a scalar or vector of floating-point type.
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285-
The types of Operand 1 and Operand 2 both must be the same as Result
238+
The types of Operand 1 and Operand 2 both must be the same as Result
286239
Type.
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288-
Results are computed per component.
289-
290-
<!-- End of AutoGen section -->
291-
```
292-
float-scalar-vector-type ::= float-type |
293-
`vector<` integer-literal `x` float-type `>`
294-
fsub-op ::= ssa-id `=` `spirv.FRemOp` ssa-use, ssa-use
295-
`:` float-scalar-vector-type
296-
```
241+
Results are computed per component.
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298243
#### Example:
299244

@@ -314,23 +259,15 @@ def SPIRV_IAddOp : SPIRV_ArithmeticBinaryOp<"IAdd",
314259
let description = [{
315260
Result Type must be a scalar or vector of integer type.
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317-
The type of Operand 1 and Operand 2 must be a scalar or vector of
262+
The type of Operand 1 and Operand 2 must be a scalar or vector of
318263
integer type. They must have the same number of components as Result
319264
Type. They must have the same component width as Result Type.
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321266
The resulting value will equal the low-order N bits of the correct
322267
result R, where N is the component width and R is computed with enough
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precision to avoid overflow and underflow.
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325-
Results are computed per component.
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327-
<!-- End of AutoGen section -->
328-
```
329-
integer-scalar-vector-type ::= integer-type |
330-
`vector<` integer-literal `x` integer-type `>`
331-
iadd-op ::= ssa-id `=` `spirv.IAdd` ssa-use, ssa-use
332-
`:` integer-scalar-vector-type
333-
```
270+
Results are computed per component.
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#### Example:
336273

@@ -391,23 +328,15 @@ def SPIRV_IMulOp : SPIRV_ArithmeticBinaryOp<"IMul",
391328
let description = [{
392329
Result Type must be a scalar or vector of integer type.
393330

394-
The type of Operand 1 and Operand 2 must be a scalar or vector of
331+
The type of Operand 1 and Operand 2 must be a scalar or vector of
395332
integer type. They must have the same number of components as Result
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Type. They must have the same component width as Result Type.
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The resulting value will equal the low-order N bits of the correct
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result R, where N is the component width and R is computed with enough
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precision to avoid overflow and underflow.
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Results are computed per component.
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<!-- End of AutoGen section -->
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```
406-
integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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imul-op ::= ssa-id `=` `spirv.IMul` ssa-use, ssa-use
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`:` integer-scalar-vector-type
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```
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Results are computed per component.
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#### Example:
413342

@@ -431,23 +360,15 @@ def SPIRV_ISubOp : SPIRV_ArithmeticBinaryOp<"ISub",
431360
let description = [{
432361
Result Type must be a scalar or vector of integer type.
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The type of Operand 1 and Operand 2 must be a scalar or vector of
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The type of Operand 1 and Operand 2 must be a scalar or vector of
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integer type. They must have the same number of components as Result
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Type. They must have the same component width as Result Type.
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The resulting value will equal the low-order N bits of the correct
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result R, where N is the component width and R is computed with enough
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precision to avoid overflow and underflow.
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Results are computed per component.
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<!-- End of AutoGen section -->
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```
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integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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isub-op ::= `spirv.ISub` ssa-use, ssa-use
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`:` integer-scalar-vector-type
450-
```
371+
Results are computed per component.
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#### Example:
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@@ -545,21 +466,13 @@ def SPIRV_SDivOp : SPIRV_ArithmeticBinaryOp<"SDiv",
545466
let description = [{
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Result Type must be a scalar or vector of integer type.
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548-
The type of Operand 1 and Operand 2 must be a scalar or vector of
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The type of Operand 1 and Operand 2 must be a scalar or vector of
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integer type. They must have the same number of components as Result
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Type. They must have the same component width as Result Type.
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Results are computed per component. The resulting value is undefined
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Results are computed per component. The resulting value is undefined
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if Operand 2 is 0.
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555-
<!-- End of AutoGen section -->
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```
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integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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sdiv-op ::= ssa-id `=` `spirv.SDiv` ssa-use, ssa-use
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`:` integer-scalar-vector-type
561-
```
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#### Example:
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565478
```mlir
@@ -583,22 +496,15 @@ def SPIRV_SModOp : SPIRV_ArithmeticBinaryOp<"SMod",
583496
let description = [{
584497
Result Type must be a scalar or vector of integer type.
585498

586-
The type of Operand 1 and Operand 2 must be a scalar or vector of
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The type of Operand 1 and Operand 2 must be a scalar or vector of
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integer type. They must have the same number of components as Result
588501
Type. They must have the same component width as Result Type.
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Results are computed per component. The resulting value is undefined
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Results are computed per component. The resulting value is undefined
591504
if Operand 2 is 0. Otherwise, the result is the remainder r of Operand
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1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
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sign of Operand 2.
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595-
<!-- End of AutoGen section -->
596-
```
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integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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smod-op ::= ssa-id `=` `spirv.SMod` ssa-use, ssa-use
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`:` integer-scalar-vector-type
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```
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#### Example:
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```mlir
@@ -683,22 +589,15 @@ def SPIRV_SRemOp : SPIRV_ArithmeticBinaryOp<"SRem",
683589
let description = [{
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Result Type must be a scalar or vector of integer type.
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The type of Operand 1 and Operand 2 must be a scalar or vector of
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The type of Operand 1 and Operand 2 must be a scalar or vector of
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integer type. They must have the same number of components as Result
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Type. They must have the same component width as Result Type.
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690-
Results are computed per component. The resulting value is undefined
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Results are computed per component. The resulting value is undefined
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if Operand 2 is 0. Otherwise, the result is the remainder r of Operand
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1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
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sign of Operand 1.
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<!-- End of AutoGen section -->
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```
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integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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srem-op ::= ssa-id `=` `spirv.SRem` ssa-use, ssa-use
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`:` integer-scalar-vector-type
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```
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#### Example:
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704603
```mlir
@@ -720,25 +619,17 @@ def SPIRV_UDivOp : SPIRV_ArithmeticBinaryOp<"UDiv",
720619
Result Type must be a scalar or vector of integer type, whose Signedness
721620
operand is 0.
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723-
The types of Operand 1 and Operand 2 both must be the same as Result
622+
The types of Operand 1 and Operand 2 both must be the same as Result
724623
Type.
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Results are computed per component. The resulting value is undefined
625+
Results are computed per component. The resulting value is undefined
727626
if Operand 2 is 0.
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729-
<!-- End of AutoGen section -->
730-
```
731-
integer-scalar-vector-type ::= integer-type |
732-
`vector<` integer-literal `x` integer-type `>`
733-
udiv-op ::= ssa-id `=` `spirv.UDiv` ssa-use, ssa-use
734-
`:` integer-scalar-vector-type
735-
```
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#### Example:
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738630
```mlir
739631
%4 = spirv.UDiv %0, %1 : i32
740632
%5 = spirv.UDiv %2, %3 : vector<4xi32>
741-
742633
```
743634
}];
744635
}
@@ -823,25 +714,17 @@ def SPIRV_UModOp : SPIRV_ArithmeticBinaryOp<"UMod",
823714
Result Type must be a scalar or vector of integer type, whose Signedness
824715
operand is 0.
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826-
The types of Operand 1 and Operand 2 both must be the same as Result
717+
The types of Operand 1 and Operand 2 both must be the same as Result
827718
Type.
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829-
Results are computed per component. The resulting value is undefined
720+
Results are computed per component. The resulting value is undefined
830721
if Operand 2 is 0.
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<!-- End of AutoGen section -->
833-
```
834-
integer-scalar-vector-type ::= integer-type |
835-
`vector<` integer-literal `x` integer-type `>`
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umod-op ::= ssa-id `=` `spirv.UMod` ssa-use, ssa-use
837-
`:` integer-scalar-vector-type
838-
```
839723
#### Example:
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841725
```mlir
842726
%4 = spirv.UMod %0, %1 : i32
843727
%5 = spirv.UMod %2, %3 : vector<4xi32>
844-
845728
```
846729
}];
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