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Merge branch 'main' into tvarghese/xxeval
2 parents 3da0ef4 + 3dc9f2d commit 2661e08

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‎clang/include/clang/Driver/Options.td

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -577,7 +577,8 @@ multiclass BoolWOption<string flag_base, KeyPathAndMacro kpm,
577577
// Works like BoolOption except without marshalling
578578
multiclass BoolOptionWithoutMarshalling<string prefix = "", string spelling_base,
579579
FlagDef flag1_base, FlagDef flag2_base,
580-
BothFlags suffix = BothFlags<[]>> {
580+
BothFlags suffix = BothFlags<[]>,
581+
list<string> flag_prefix = ["-"]> {
581582
defvar flag1 = FlagDefExpanded<ApplySuffix<flag1_base, suffix>.Result, prefix,
582583
NAME, spelling_base>;
583584

@@ -598,12 +599,12 @@ multiclass BoolOptionWithoutMarshalling<string prefix = "", string spelling_base
598599

599600
defvar implied = !if(flag1.CanBeImplied, flag1, flag2);
600601

601-
def flag1.RecordName : Flag<["-"], flag1.Spelling>, Flags<flag1.OptionFlags>,
602+
def flag1.RecordName : Flag<flag_prefix, flag1.Spelling>, Flags<flag1.OptionFlags>,
602603
Visibility<flag1.OptionVisibility>,
603604
HelpText<flag1.Help>,
604605
ImpliedByAnyOf<implied.ImpliedBy, implied.ValueAsCode>
605606
{}
606-
def flag2.RecordName : Flag<["-"], flag2.Spelling>, Flags<flag2.OptionFlags>,
607+
def flag2.RecordName : Flag<flag_prefix, flag2.Spelling>, Flags<flag2.OptionFlags>,
607608
Visibility<flag2.OptionVisibility>,
608609
HelpText<flag2.Help>,
609610
ImpliedByAnyOf<implied.ImpliedBy, implied.ValueAsCode>
@@ -5756,12 +5757,17 @@ def nobuiltininc : Flag<["-"], "nobuiltininc">,
57565757
Group<IncludePath_Group>,
57575758
HelpText<"Disable builtin #include directories only">,
57585759
MarshallingInfoNegativeFlag<HeaderSearchOpts<"UseBuiltinIncludes">>;
5759-
def nogpuinc : Flag<["-"], "nogpuinc">, Group<IncludePath_Group>,
5760-
HelpText<"Do not add include paths for CUDA/HIP and"
5761-
" do not include the default CUDA/HIP wrapper headers">;
5760+
defm offload_inc: BoolOptionWithoutMarshalling<"", "offload-inc",
5761+
PosFlag<SetTrue, [], [ClangOption], "Add include paths for CUDA/HIP and"
5762+
" include the default CUDA/HIP wrapper headers (default)">,
5763+
NegFlag<SetFalse, [], [ClangOption], "Do not add include paths for CUDA/HIP"
5764+
" and include the default CUDA/HIP wrapper headers">,
5765+
BothFlags<[]>, ["--"]>, Group<IncludePath_Group>;
5766+
def : Flag<["-"], "nogpuinc">, Alias<no_offload_inc>;
5767+
57625768
def nohipwrapperinc : Flag<["-"], "nohipwrapperinc">, Group<IncludePath_Group>,
57635769
HelpText<"Do not include the default HIP wrapper headers and include paths">;
5764-
def : Flag<["-"], "nocudainc">, Alias<nogpuinc>;
5770+
def : Flag<["-"], "nocudainc">, Alias<no_offload_inc>;
57655771
def no_offloadlib
57665772
: Flag<["--"], "no-offloadlib">,
57675773
MarshallingInfoFlag<LangOpts<"NoGPULib">>,

‎clang/lib/CodeGen/CGHLSLBuiltins.cpp

Lines changed: 9 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -676,35 +676,23 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
676676
case Builtin::BI__builtin_hlsl_wave_active_sum: {
677677
// Due to the use of variadic arguments, explicitly retreive argument
678678
Value *OpExpr = EmitScalarExpr(E->getArg(0));
679-
llvm::FunctionType *FT = llvm::FunctionType::get(
680-
OpExpr->getType(), ArrayRef{OpExpr->getType()}, false);
681679
Intrinsic::ID IID = getWaveActiveSumIntrinsic(
682680
getTarget().getTriple().getArch(), CGM.getHLSLRuntime(),
683681
E->getArg(0)->getType());
684682

685-
// Get overloaded name
686-
std::string Name =
687-
Intrinsic::getName(IID, ArrayRef{OpExpr->getType()}, &CGM.getModule());
688-
return EmitRuntimeCall(CGM.CreateRuntimeFunction(FT, Name, {},
689-
/*Local=*/false,
690-
/*AssumeConvergent=*/true),
683+
return EmitRuntimeCall(Intrinsic::getOrInsertDeclaration(
684+
&CGM.getModule(), IID, {OpExpr->getType()}),
691685
ArrayRef{OpExpr}, "hlsl.wave.active.sum");
692686
}
693687
case Builtin::BI__builtin_hlsl_wave_active_max: {
694688
// Due to the use of variadic arguments, explicitly retreive argument
695689
Value *OpExpr = EmitScalarExpr(E->getArg(0));
696-
llvm::FunctionType *FT = llvm::FunctionType::get(
697-
OpExpr->getType(), ArrayRef{OpExpr->getType()}, false);
698690
Intrinsic::ID IID = getWaveActiveMaxIntrinsic(
699691
getTarget().getTriple().getArch(), CGM.getHLSLRuntime(),
700692
E->getArg(0)->getType());
701693

702-
// Get overloaded name
703-
std::string Name =
704-
Intrinsic::getName(IID, ArrayRef{OpExpr->getType()}, &CGM.getModule());
705-
return EmitRuntimeCall(CGM.CreateRuntimeFunction(FT, Name, {},
706-
/*Local=*/false,
707-
/*AssumeConvergent=*/true),
694+
return EmitRuntimeCall(Intrinsic::getOrInsertDeclaration(
695+
&CGM.getModule(), IID, {OpExpr->getType()}),
708696
ArrayRef{OpExpr}, "hlsl.wave.active.max");
709697
}
710698
case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
@@ -739,18 +727,11 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
739727
// create our function type.
740728
Value *OpExpr = EmitScalarExpr(E->getArg(0));
741729
Value *OpIndex = EmitScalarExpr(E->getArg(1));
742-
llvm::FunctionType *FT = llvm::FunctionType::get(
743-
OpExpr->getType(), ArrayRef{OpExpr->getType(), OpIndex->getType()},
744-
false);
745-
746-
// Get overloaded name
747-
std::string Name =
748-
Intrinsic::getName(CGM.getHLSLRuntime().getWaveReadLaneAtIntrinsic(),
749-
ArrayRef{OpExpr->getType()}, &CGM.getModule());
750-
return EmitRuntimeCall(CGM.CreateRuntimeFunction(FT, Name, {},
751-
/*Local=*/false,
752-
/*AssumeConvergent=*/true),
753-
ArrayRef{OpExpr, OpIndex}, "hlsl.wave.readlane");
730+
return EmitRuntimeCall(
731+
Intrinsic::getOrInsertDeclaration(
732+
&CGM.getModule(), CGM.getHLSLRuntime().getWaveReadLaneAtIntrinsic(),
733+
{OpExpr->getType()}),
734+
ArrayRef{OpExpr, OpIndex}, "hlsl.wave.readlane");
754735
}
755736
case Builtin::BI__builtin_hlsl_elementwise_sign: {
756737
auto *Arg0 = E->getArg(0);

‎clang/lib/Driver/ToolChains/AMDGPU.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -525,7 +525,8 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const ArgList &DriverArgs,
525525
"hipstdpar_lib.hpp"});
526526
};
527527

528-
if (DriverArgs.hasArg(options::OPT_nogpuinc)) {
528+
if (!DriverArgs.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
529+
true)) {
529530
if (HasHipStdPar)
530531
HandleHipStdPar();
531532

‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -937,7 +937,8 @@ void Clang::AddPreprocessingOptions(Compilation &C, const JobAction &JA,
937937
// openmp_wrappers folder which contains alternative system headers.
938938
if (JA.isDeviceOffloading(Action::OFK_OpenMP) &&
939939
!Args.hasArg(options::OPT_nostdinc) &&
940-
!Args.hasArg(options::OPT_nogpuinc) &&
940+
Args.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
941+
true) &&
941942
getToolChain().getTriple().isGPU()) {
942943
if (!Args.hasArg(options::OPT_nobuiltininc)) {
943944
// Add openmp_wrappers/* to our system include path. This lets us wrap
@@ -1120,7 +1121,8 @@ void Clang::AddPreprocessingOptions(Compilation &C, const JobAction &JA,
11201121
// TODO: This should be moved to `AddClangSystemIncludeArgs` by passing the
11211122
// OffloadKind as an argument.
11221123
if (!Args.hasArg(options::OPT_nostdinc) &&
1123-
!Args.hasArg(options::OPT_nogpuinc) &&
1124+
Args.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
1125+
true) &&
11241126
!Args.hasArg(options::OPT_nobuiltininc)) {
11251127
// Without an offloading language we will include these headers directly.
11261128
// Offloading languages will instead only use the declarations stored in

‎clang/lib/Driver/ToolChains/Cuda.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -302,7 +302,8 @@ void CudaInstallationDetector::AddCudaIncludeArgs(
302302
CC1Args.push_back(DriverArgs.MakeArgString(P));
303303
}
304304

305-
if (DriverArgs.hasArg(options::OPT_nogpuinc))
305+
if (!DriverArgs.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
306+
true))
306307
return;
307308

308309
if (!isValid()) {
@@ -928,7 +929,8 @@ llvm::DenormalMode CudaToolChain::getDefaultDenormalModeForType(
928929
void CudaToolChain::AddCudaIncludeArgs(const ArgList &DriverArgs,
929930
ArgStringList &CC1Args) const {
930931
// Check our CUDA version if we're going to include the CUDA headers.
931-
if (!DriverArgs.hasArg(options::OPT_nogpuinc) &&
932+
if (DriverArgs.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
933+
true) &&
932934
!DriverArgs.hasArg(options::OPT_no_cuda_version_check)) {
933935
StringRef Arch = DriverArgs.getLastArgValue(options::OPT_march_EQ);
934936
assert(!Arch.empty() && "Must have an explicit GPU arch.");
@@ -1001,7 +1003,9 @@ void CudaToolChain::AddClangSystemIncludeArgs(const ArgList &DriverArgs,
10011003
ArgStringList &CC1Args) const {
10021004
HostTC.AddClangSystemIncludeArgs(DriverArgs, CC1Args);
10031005

1004-
if (!DriverArgs.hasArg(options::OPT_nogpuinc) && CudaInstallation.isValid())
1006+
if (DriverArgs.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
1007+
true) &&
1008+
CudaInstallation.isValid())
10051009
CC1Args.append(
10061010
{"-internal-isystem",
10071011
DriverArgs.MakeArgString(CudaInstallation.getIncludePath())});

‎clang/lib/Driver/ToolChains/HIPSPV.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -187,7 +187,8 @@ void HIPSPVToolChain::AddIAMCUIncludeArgs(const ArgList &Args,
187187

188188
void HIPSPVToolChain::AddHIPIncludeArgs(const ArgList &DriverArgs,
189189
ArgStringList &CC1Args) const {
190-
if (DriverArgs.hasArg(options::OPT_nogpuinc))
190+
if (!DriverArgs.hasFlag(options::OPT_offload_inc, options::OPT_no_offload_inc,
191+
true))
191192
return;
192193

193194
StringRef hipPath = DriverArgs.getLastArgValue(options::OPT_hip_path_EQ);

‎clang/test/CodeGenHLSL/builtins/WaveActiveMax.hlsl

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ int test_int(int expr) {
1616
}
1717

1818
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.max.i32([[TY]]) #[[#attr:]]
19-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.max.i32([[TY]]) #[[#attr:]]
19+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.reduce.max.i32([[TY]]) #[[#attr:]]
2020

2121
// CHECK-LABEL: test_uint64_t
2222
uint64_t test_uint64_t(uint64_t expr) {
@@ -27,7 +27,7 @@ uint64_t test_uint64_t(uint64_t expr) {
2727
}
2828

2929
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.umax.i64([[TY]]) #[[#attr:]]
30-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.umax.i64([[TY]]) #[[#attr:]]
30+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.reduce.umax.i64([[TY]]) #[[#attr:]]
3131

3232
// Test basic lowering to runtime function call with array and float value.
3333

@@ -40,7 +40,7 @@ float4 test_floatv4(float4 expr) {
4040
}
4141

4242
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.reduce.max.v4f32([[TY1]]) #[[#attr]]
43-
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.reduce.max.v4f32([[TY1]]) #[[#attr]]
43+
// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.reduce.max.v4f32([[TY1]]) #[[#attr]]
4444

4545
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}
4646

‎clang/test/CodeGenHLSL/builtins/WaveActiveSum.hlsl

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ int test_int(int expr) {
1616
}
1717

1818
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.sum.i32([[TY]]) #[[#attr:]]
19-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.sum.i32([[TY]]) #[[#attr:]]
19+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.reduce.sum.i32([[TY]]) #[[#attr:]]
2020

2121
// CHECK-LABEL: test_uint64_t
2222
uint64_t test_uint64_t(uint64_t expr) {
@@ -27,7 +27,7 @@ uint64_t test_uint64_t(uint64_t expr) {
2727
}
2828

2929
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.usum.i64([[TY]]) #[[#attr:]]
30-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.sum.i64([[TY]]) #[[#attr:]]
30+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.reduce.sum.i64([[TY]]) #[[#attr:]]
3131

3232
// Test basic lowering to runtime function call with array and float value.
3333

@@ -40,6 +40,6 @@ float4 test_floatv4(float4 expr) {
4040
}
4141

4242
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.reduce.sum.v4f32([[TY1]]) #[[#attr]]
43-
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.reduce.sum.v4f32([[TY1]]) #[[#attr]]
43+
// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.reduce.sum.v4f32([[TY1]]) #[[#attr]]
4444

4545
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

‎clang/test/CodeGenHLSL/builtins/WaveReadLaneAt.hlsl

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ int test_int(int expr, uint idx) {
1717
}
1818

1919
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i32([[TY]], i32) #[[#attr:]]
20-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.i32([[TY]], i32) #[[#attr:]]
20+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i32([[TY]], i32) #[[#attr:]]
2121

2222
// CHECK-LABEL: test_uint
2323
uint test_uint(uint expr, uint idx) {
@@ -38,7 +38,7 @@ int64_t test_int64_t(int64_t expr, uint idx) {
3838
}
3939

4040
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i64([[TY]], i32) #[[#attr:]]
41-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.i64([[TY]], i32) #[[#attr:]]
41+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i64([[TY]], i32) #[[#attr:]]
4242

4343
// CHECK-LABEL: test_uint64_t
4444
uint64_t test_uint64_t(uint64_t expr, uint idx) {
@@ -60,7 +60,7 @@ int16_t test_int16(int16_t expr, uint idx) {
6060
}
6161

6262
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i16([[TY]], i32) #[[#attr:]]
63-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.i16([[TY]], i32) #[[#attr:]]
63+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i16([[TY]], i32) #[[#attr:]]
6464

6565
// CHECK-LABEL: test_uint16
6666
uint16_t test_uint16(uint16_t expr, uint idx) {
@@ -84,7 +84,7 @@ half test_half(half expr, uint idx) {
8484
}
8585

8686
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.f16([[TY]], i32) #[[#attr:]]
87-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.f16([[TY]], i32) #[[#attr:]]
87+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.f16([[TY]], i32) #[[#attr:]]
8888

8989
// CHECK-LABEL: test_double
9090
double test_double(double expr, uint idx) {
@@ -96,7 +96,7 @@ double test_double(double expr, uint idx) {
9696
}
9797

9898
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.f64([[TY]], i32) #[[#attr:]]
99-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.f64([[TY]], i32) #[[#attr:]]
99+
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.f64([[TY]], i32) #[[#attr:]]
100100

101101
// CHECK-LABEL: test_floatv4
102102
float4 test_floatv4(float4 expr, uint idx) {
@@ -108,6 +108,6 @@ float4 test_floatv4(float4 expr, uint idx) {
108108
}
109109

110110
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]
111-
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]
111+
// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]
112112

113113
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

‎clang/test/Driver/hip-include-path.hip

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,10 @@
1212
// RUN: -std=c++11 --rocm-path=%S/Inputs/rocm -nogpuinc -nogpulib %s 2>&1 \
1313
// RUN: | FileCheck -check-prefixes=COMMON,CLANG,NOHIP %s
1414

15+
// RUN: %clang -c -### --target=x86_64-unknown-linux-gnu --cuda-gpu-arch=gfx900 \
16+
// RUN: -std=c++11 --rocm-path=%S/Inputs/rocm --no-offload-inc -nogpulib --offload-inc %s 2>&1 \
17+
// RUN: | FileCheck -check-prefixes=COMMON,CLANG,HIP %s
18+
1519
// COMMON-LABEL: "{{[^"]*}}clang{{[^"]*}}" "-cc1"
1620
// CLANG-SAME: "-internal-isystem" "{{[^"]*}}/lib{{[^"]*}}/clang/{{[^"]*}}/include/cuda_wrappers"
1721
// NOCLANG-NOT: "{{[^"]*}}/lib{{[^"]*}}/clang/{{[^"]*}}/include/cuda_wrappers"

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