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Commit 1e1290d

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Tony Varghese
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Added assert for unknown ShiftAmount and an early exit condition for FullValue of zeros and all ones
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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

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@@ -15760,6 +15760,9 @@ SDValue PPCTargetLowering::combineBVLoadsSpecialValue(SDValue Op,
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FullVal |= ElemAPInt;
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}
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if (FullVal.isZero() || FullVal.isAllOnes())
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return SDValue();
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if (auto UIMOpt = getPatternInfo(FullVal)) {
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const auto &[Uim, ShiftAmount] = *UIMOpt;
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SDLoc Dl(Op);
@@ -15775,6 +15778,8 @@ SDValue PPCTargetLowering::combineBVLoadsSpecialValue(SDValue Op,
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return LxvkqInstr;
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}
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assert(ShiftAmount == 127 && "Unexpected lxvkq shift amount value");
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// The right shifted pattern can be constructed using a combination of
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// XXSPLTIB and VSRQ instruction. VSRQ uses the shift amount from the lower
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// 7 bits of byte 15. This can be specified using XXSPLTIB with immediate

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