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[CIR][CIRGen][Builtin][Neon] Lower neon_vaddlvq_s16 #1231

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Merged
merged 1 commit into from
Dec 12, 2024
Merged

[CIR][CIRGen][Builtin][Neon] Lower neon_vaddlvq_s16 #1231

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16 changes: 9 additions & 7 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4291,11 +4291,16 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
case NEON::BI__builtin_neon_vaddlvq_u8: {
llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_u8 NYI");
}
case NEON::BI__builtin_neon_vaddlvq_u16: {
mlir::Type argTy = cir::VectorType::get(builder.getContext(), UInt16Ty, 8);
case NEON::BI__builtin_neon_vaddlvq_u16:
usgn = true;
[[fallthrough]];
case NEON::BI__builtin_neon_vaddlvq_s16: {
mlir::Type argTy = cir::VectorType::get(builder.getContext(),
usgn ? UInt16Ty : SInt16Ty, 8);
llvm::SmallVector<mlir::Value, 1> argOps = {emitScalarExpr(E->getArg(0))};
return emitNeonCall(builder, {argTy}, argOps, "aarch64.neon.uaddlv",
UInt32Ty, getLoc(E->getExprLoc()));
return emitNeonCall(builder, {argTy}, argOps,
usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
}
case NEON::BI__builtin_neon_vaddlv_s8: {
llvm_unreachable("NEON::BI__builtin_neon_vaddlv_s8 NYI");
Expand All @@ -4306,9 +4311,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
case NEON::BI__builtin_neon_vaddlvq_s8: {
llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_s8 NYI");
}
case NEON::BI__builtin_neon_vaddlvq_s16: {
llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_s16 NYI");
}
case NEON::BI__builtin_neon_vsri_n_v:
case NEON::BI__builtin_neon_vsriq_n_v: {
llvm_unreachable("NEON::BI__builtin_neon_vsriq_n_v NYI");
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11 changes: 11 additions & 0 deletions clang/test/CIR/CodeGen/AArch64/neon-arith.c
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Original file line number Diff line number Diff line change
Expand Up @@ -894,6 +894,17 @@ uint32_t test_vaddlvq_u16(uint16x8_t a) {
// LLVM: ret i32 [[VADDLV_I]]
}

int32_t test_vaddlvq_s16(int16x8_t a) {
return vaddlvq_s16(a);

// CIR-LABEL: vaddlvq_s16
// CIR: cir.llvm.intrinsic "aarch64.neon.saddlv" {{%.*}}: (!cir.vector<!s16i x 8>) -> !s32i

// LLVM: {{.*}}test_vaddlvq_s16(<8 x i16>{{.*}}[[A:%.*]])
// LLVM: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> [[A]])
// LLVM: ret i32 [[VADDLV_I]]
}

uint16_t test_vaddv_u16(uint16x4_t a) {
return vaddv_u16(a);

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