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Correct MIPS architecture version #1344
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📝 WalkthroughWalkthroughThe pull request updates the terminology used in the documentation to reference the MIPS instruction set architecture. Specifically, it changes mentions of "MIPS III instructions" or "32-bit, Big-Endian, MIPS III Instruction Set Architecture" to "MIPS32 R1 instructions" or "MIPS32 R1 Instruction Set Architecture" in multiple documentation files. The affected pages include those for fault proofs and smart contracts, ensuring that all references accurately denote the correct architecture version. There are no changes to functional code, logic, error handling, or control flow. Possibly related PRs
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#### MIPS | ||
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The `MIPS` contract provides an on-chain implementation of a 32-bit, Big-Endian MIPS III virtual machine, | ||
The `MIPS` contract provides an on-chain implementation of a MIPS32 R1 virtual machine, |
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I think we probably still want to call out "Big-Endian" here.
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good point, fixed in #1357 (for both places where it was removed).
Cannon is actually MIPS32 R1, not MIPS III.